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Searched refs:TDC_VRM_LIMIT__IDDC__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_1_sh_mask.h2776 #define TDC_VRM_LIMIT__IDDC__SHIFT 0x10 macro
H A Dsmu_7_0_1_sh_mask.h2620 #define TDC_VRM_LIMIT__IDDC__SHIFT 0x10 macro
H A Dsmu_7_1_0_sh_mask.h2616 #define TDC_VRM_LIMIT__IDDC__SHIFT 0x10 macro
H A Dsmu_7_1_2_sh_mask.h906 #define TDC_VRM_LIMIT__IDDC__SHIFT 0x10 macro
H A Dsmu_7_1_3_sh_mask.h934 #define TDC_VRM_LIMIT__IDDC__SHIFT 0x10 macro