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Searched refs:UVD_CGC_CTRL__VCPU_MODE_MASK (Results 1 – 22 of 22) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h462 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Duvd_3_1_sh_mask.h263 #define UVD_CGC_CTRL__VCPU_MODE_MASK 0x20000000 macro
H A Duvd_4_0_sh_mask.h74 #define UVD_CGC_CTRL__VCPU_MODE_MASK 0x20000000L macro
H A Duvd_4_2_sh_mask.h263 #define UVD_CGC_CTRL__VCPU_MODE_MASK 0x20000000 macro
H A Duvd_5_0_sh_mask.h285 #define UVD_CGC_CTRL__VCPU_MODE_MASK 0x20000000 macro
H A Duvd_6_0_sh_mask.h287 #define UVD_CGC_CTRL__VCPU_MODE_MASK 0x20000000 macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c577 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v4_0_3_disable_clock_gating()
651 UVD_CGC_CTRL__VCPU_MODE_MASK); in vcn_v4_0_3_disable_clock_gating_dpg_mode()
704 | UVD_CGC_CTRL__VCPU_MODE_MASK); in vcn_v4_0_3_enable_clock_gating()
H A Dvcn_v1_0.c530 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v1_0_disable_clock_gating()
630 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v1_0_enable_clock_gating()
688 UVD_CGC_CTRL__VCPU_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c549 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v2_0_disable_clock_gating()
625 UVD_CGC_CTRL__VCPU_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
686 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v4_0.c720 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v4_0_disable_clock_gating()
805 UVD_CGC_CTRL__VCPU_MODE_MASK); in vcn_v4_0_disable_clock_gating_dpg_mode()
863 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v4_0_enable_clock_gating()
H A Dvcn_v2_5.c635 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v2_5_disable_clock_gating()
712 UVD_CGC_CTRL__VCPU_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
774 | UVD_CGC_CTRL__VCPU_MODE_MASK); in vcn_v2_5_enable_clock_gating()
H A Duvd_v5_0.c709 UVD_CGC_CTRL__VCPU_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v3_0.c757 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v3_0_disable_clock_gating()
856 UVD_CGC_CTRL__VCPU_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
915 | UVD_CGC_CTRL__VCPU_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1366 UVD_CGC_CTRL__VCPU_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
H A Duvd_v7_0.c1650 UVD_CGC_CTRL__VCPU_MODE_MASK |
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h955 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Dvcn_2_5_sh_mask.h2023 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1974 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3694 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2753 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h131 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h131 #define UVD_CGC_CTRL__VCPU_MODE_MASK … macro