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Searched refs:UVD_CGC_STATUS__VCPU_VCLK__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h216 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
H A Duvd_4_0_sh_mask.h205 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x0000001a macro
H A Duvd_4_2_sh_mask.h216 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
H A Duvd_5_0_sh_mask.h232 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
H A Duvd_6_0_sh_mask.h234 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h872 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro
H A Dvcn_2_5_sh_mask.h1942 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1892 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3613 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2672 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3835 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3870 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT … macro