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Searched refs:UVD_MPC_SET_ALU__OPERAND__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h642 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Duvd_3_1_sh_mask.h518 #define UVD_MPC_SET_ALU__OPERAND__SHIFT 0x4 macro
H A Duvd_4_0_sh_mask.h495 #define UVD_MPC_SET_ALU__OPERAND__SHIFT 0x00000004 macro
H A Duvd_4_2_sh_mask.h522 #define UVD_MPC_SET_ALU__OPERAND__SHIFT 0x4 macro
H A Duvd_5_0_sh_mask.h554 #define UVD_MPC_SET_ALU__OPERAND__SHIFT 0x4 macro
H A Duvd_6_0_sh_mask.h556 #define UVD_MPC_SET_ALU__OPERAND__SHIFT 0x4 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1149 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2890 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2655 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h2882 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3963 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4213 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4256 #define UVD_MPC_SET_ALU__OPERAND__SHIFT … macro