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Searched refs:UVD_SUVD_CGC_GATE__ENT_MASK (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h241 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h469 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
H A Dvcn_2_5_sh_mask.h2098 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
H A Dvcn_2_0_0_sh_mask.h3224 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
H A Dvcn_2_6_0_sh_mask.h3769 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
H A Dvcn_3_0_0_sh_mask.h2834 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
H A Dvcn_4_0_0_sh_mask.h1351 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
H A Dvcn_4_0_3_sh_mask.h1351 #define UVD_SUVD_CGC_GATE__ENT_MASK macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c595 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v1_0.c551 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_0.c570 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c740 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v2_5.c656 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c776 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v3_0_disable_clock_gating()