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Searched refs:UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h501 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2131 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h3257 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3802 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2873 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3926 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3961 #define UVD_SUVD_CGC_STATUS__SITE_HEVC_DCLK__SHIFT … macro