Searched refs:VECREDUCE_SMAX (Results 1 – 15 of 15) sorted by relevance
/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 1289 VECREDUCE_SMAX, enumerator
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 436 case ISD::VECREDUCE_SMAX: in LegalizeOp() 938 case ISD::VECREDUCE_SMAX: in Expand()
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H A D | SelectionDAGDumper.cpp | 488 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; in getOperationName()
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H A D | LegalizeIntegerTypes.cpp | 246 case ISD::VECREDUCE_SMAX: in PromoteIntegerResult() 1718 case ISD::VECREDUCE_SMAX: in PromoteIntegerOperand() 2247 case ISD::VECREDUCE_SMAX: in getExtendForIntVecReduction() 2555 case ISD::VECREDUCE_SMAX: in ExpandIntegerResult()
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H A D | LegalizeVectorTypes.cpp | 692 case ISD::VECREDUCE_SMAX: in ScalarizeVectorOperand() 2879 case ISD::VECREDUCE_SMAX: in SplitVectorOperand() 5840 case ISD::VECREDUCE_SMAX: in WidenVectorOperand()
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H A D | LegalizeDAG.cpp | 1196 case ISD::VECREDUCE_SMAX: in LegalizeOp() 3861 case ISD::VECREDUCE_SMAX: in ExpandNode()
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H A D | SelectionDAG.cpp | 439 case ISD::VECREDUCE_SMAX: in getVecReduceBaseOpcode() 5603 case ISD::VECREDUCE_SMAX: in getNode()
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H A D | SelectionDAGBuilder.cpp | 9833 Res = DAG.getNode(ISD::VECREDUCE_SMAX, dl, VT, Op1); in visitVectorReduce()
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H A D | DAGCombiner.cpp | 1822 case ISD::VECREDUCE_SMAX: in visit()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 870 ISD::VECREDUCE_XOR, ISD::VECREDUCE_SMAX, ISD::VECREDUCE_SMIN, in initActions()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1135 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom); in AArch64TargetLowering() 1255 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom); in AArch64TargetLowering() 1508 setOperationAction(ISD::VECREDUCE_SMAX, MVT::v2i64, Custom); in AArch64TargetLowering() 1796 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom); in addTypeForStreamingSVE() 1923 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom); in addTypeForFixedLengthSVE() 5997 case ISD::VECREDUCE_SMAX: in LowerOperation() 13233 case ISD::VECREDUCE_SMAX: in LowerVECREDUCE() 13259 case ISD::VECREDUCE_SMAX: in LowerVECREDUCE() 22094 case ISD::VECREDUCE_SMAX: in ReplaceNodeResults()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 514 ISD::VECREDUCE_XOR, ISD::VECREDUCE_SMAX, ISD::VECREDUCE_SMIN, in RISCVTargetLowering() 905 setOperationAction({ISD::VECREDUCE_ADD, ISD::VECREDUCE_SMAX, in RISCVTargetLowering() 4014 case ISD::VECREDUCE_SMAX: in LowerOperation() 5876 case ISD::VECREDUCE_SMAX: in getRVVReductionOp() 8132 case ISD::VECREDUCE_SMAX: in ReplaceNodeResults()
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/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 352 ISD::VECREDUCE_SMAX, ISD::VECREDUCE_UMIN, ISD::VECREDUCE_UMAX}; in initVPUActions()
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/openbsd/gnu/llvm/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 467 def vecreduce_smax : SDNode<"ISD::VECREDUCE_SMAX", SDTVecReduce>;
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 295 setOperationAction(ISD::VECREDUCE_SMAX, VT, Legal); in addMVEVectorTypes() 13093 } else if ((TrueVal->getOpcode() == ISD::VECREDUCE_SMAX || in PerformSELECTCombine() 13094 FalseVal->getOpcode() == ISD::VECREDUCE_SMAX) && in PerformSELECTCombine() 13107 case ISD::VECREDUCE_SMAX: in PerformSELECTCombine()
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