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Searched refs:VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK (Results 1 – 16 of 16) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9555 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK 0x02000000L macro
H A Ddce_8_0_sh_mask.h10949 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK 0x2000000 macro
H A Ddce_10_0_sh_mask.h11333 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK 0x2000000 macro
H A Ddce_11_0_sh_mask.h11145 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK 0x2000000 macro
H A Ddce_11_2_sh_mask.h12399 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK 0x2000000 macro
H A Ddce_12_0_sh_mask.h2000 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h37 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_1_0_sh_mask.h1550 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_2_1_0_sh_mask.h51 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_3_2_1_sh_mask.h4235 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_3_1_5_sh_mask.h4934 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_3_1_6_sh_mask.h7741 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_3_0_2_sh_mask.h50 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_2_0_0_sh_mask.h50 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_3_0_0_sh_mask.h31 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro
H A Ddcn_3_2_0_sh_mask.h4234 #define VGA_RENDER_CONTROL__VGAREG_LINECMP_COMPATIBILITY_SEL_MASK … macro