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Searched refs:VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK (Results 1 – 19 of 19) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9547 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK 0x0000001fL macro
H A Ddce_8_0_sh_mask.h10937 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK 0x1f macro
H A Ddce_10_0_sh_mask.h11321 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK 0x1f macro
H A Ddce_11_0_sh_mask.h11133 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK 0x1f macro
H A Ddce_11_2_sh_mask.h12387 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK 0x1f macro
H A Ddce_12_0_sh_mask.h1994 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h31 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_1_0_sh_mask.h1544 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h45 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h443 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h4229 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h7099 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h4928 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h7584 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h7735 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h44 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h44 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h25 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h4228 #define VGA_RENDER_CONTROL__VGA_BLINK_RATE_MASK … macro