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Searched refs:VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK (Results 1 – 19 of 19) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9603 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h11087 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h11471 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h11283 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h12537 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h2109 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h146 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_1_0_sh_mask.h1659 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_2_1_0_sh_mask.h160 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_0_1_sh_mask.h557 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_2_1_sh_mask.h4344 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_1_2_sh_mask.h7213 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_1_5_sh_mask.h5057 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_1_4_sh_mask.h7698 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_1_6_sh_mask.h7864 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_0_2_sh_mask.h159 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_2_0_0_sh_mask.h159 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_0_0_sh_mask.h140 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro
H A Ddcn_3_2_0_sh_mask.h4343 #define VGA_STATUS__VGA_MEM_ACCESS_STATUS_MASK … macro