Searched refs:VLMUL (Results 1 – 10 of 10) sorted by relevance
/openbsd/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVBaseInfo.cpp | 135 unsigned RISCVVType::encodeVTYPE(RISCVII::VLMUL VLMUL, unsigned SEW, in encodeVTYPE() argument 138 unsigned VLMULBits = static_cast<unsigned>(VLMUL); in encodeVTYPE() 149 std::pair<unsigned, bool> RISCVVType::decodeVLMUL(RISCVII::VLMUL VLMUL) { in decodeVLMUL() argument 150 switch (VLMUL) { in decodeVLMUL() 153 case RISCVII::VLMUL::LMUL_1: in decodeVLMUL() 154 case RISCVII::VLMUL::LMUL_2: in decodeVLMUL() 155 case RISCVII::VLMUL::LMUL_4: in decodeVLMUL() 156 case RISCVII::VLMUL::LMUL_8: in decodeVLMUL() 158 case RISCVII::VLMUL::LMUL_F2: in decodeVLMUL() 159 case RISCVII::VLMUL::LMUL_F4: in decodeVLMUL() [all …]
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H A D | RISCVBaseInfo.h | 115 enum VLMUL : uint8_t { enum 143 static inline VLMUL getLMul(uint64_t TSFlags) { in getLMul() 144 return static_cast<VLMUL>((TSFlags & VLMulMask) >> VLMulShift); in getLMul() 428 unsigned encodeVTYPE(RISCVII::VLMUL VLMUL, unsigned SEW, bool TailAgnostic, 431 inline static RISCVII::VLMUL getVLMUL(unsigned VType) { in getVLMUL() 432 unsigned VLMUL = VType & 0x7; in getVLMUL() local 433 return static_cast<RISCVII::VLMUL>(VLMUL); in getVLMUL() 437 std::pair<unsigned, bool> decodeVLMUL(RISCVII::VLMUL VLMUL); 439 inline static RISCVII::VLMUL encodeLMUL(unsigned LMUL, bool Fractional) { in encodeLMUL() 442 return static_cast<RISCVII::VLMUL>(Fractional ? 8 - LmulLog2 : LmulLog2); in encodeLMUL() [all …]
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H A D | RISCVInstPrinter.cpp | 171 if (RISCVVType::getVLMUL(Imm) == RISCVII::VLMUL::LMUL_RESERVED || in printVTypeI()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 229 case RISCVII::VLMUL::LMUL_F8: in createTuple() 230 case RISCVII::VLMUL::LMUL_F4: in createTuple() 231 case RISCVII::VLMUL::LMUL_F2: in createTuple() 232 case RISCVII::VLMUL::LMUL_1: in createTuple() 238 case RISCVII::VLMUL::LMUL_2: in createTuple() 244 case RISCVII::VLMUL::LMUL_4: in createTuple() 319 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLSEG() 362 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLSEGFF() 407 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLXSEG() 465 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVSSEG() [all …]
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H A D | RISCVInsertVSETVLI.cpp | 306 RISCVII::VLMUL VLMul = RISCVII::LMUL_1; 349 RISCVII::VLMUL getVLMUL() const { return VLMul; } in getVLMUL() 383 void setVTYPE(RISCVII::VLMUL L, unsigned S, bool TA, bool MA) { in setVTYPE() 679 RISCVII::VLMUL VLMul = RISCVII::getLMul(TSFlags); in INITIALIZE_PASS()
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H A D | RISCVISelLowering.h | 581 static RISCVII::VLMUL getLMUL(MVT VT); 591 static unsigned getRegClassIDForLMUL(RISCVII::VLMUL LMul);
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H A D | RISCVISelLowering.cpp | 1607 return RISCVII::VLMUL::LMUL_1; in getLMUL() 1609 return RISCVII::VLMUL::LMUL_2; in getLMUL() 1611 return RISCVII::VLMUL::LMUL_4; in getLMUL() 1613 return RISCVII::VLMUL::LMUL_8; in getLMUL() 1621 case RISCVII::VLMUL::LMUL_F8: in getRegClassIDForLMUL() 1622 case RISCVII::VLMUL::LMUL_F4: in getRegClassIDForLMUL() 1623 case RISCVII::VLMUL::LMUL_F2: in getRegClassIDForLMUL() 1624 case RISCVII::VLMUL::LMUL_1: in getRegClassIDForLMUL() 1626 case RISCVII::VLMUL::LMUL_2: in getRegClassIDForLMUL() 1628 case RISCVII::VLMUL::LMUL_4: in getRegClassIDForLMUL() [all …]
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H A D | RISCVInstrInfo.cpp | 129 RISCVII::VLMUL LMul) { in isConvertibleToVMV_V_V() 159 RISCVII::VLMUL FirstLMul = RISCVVType::getVLMUL(FirstVType); in isConvertibleToVMV_V_V() 282 RISCVII::VLMUL LMul = RISCVII::LMUL_1; in copyPhysReg()
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/openbsd/gnu/llvm/llvm/include/llvm/IR/ |
H A D | IntrinsicsRISCV.td | 134 /* VLMUL */ LLVMMatchType<0>], 140 /* VLMUL */ LLVMMatchType<0>], 150 /* VLMUL */ LLVMMatchType<0>], 156 /* VLMUL */ LLVMMatchType<0>],
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 1771 RISCVII::VLMUL VLMUL = RISCVVType::encodeLMUL(Lmul, Fractional); in parseVTypeI() local 1774 RISCVVType::encodeVTYPE(VLMUL, Sew, TailAgnostic, MaskAgnostic); in parseVTypeI()
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