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Searched refs:VReg1 (Results 1 – 3 of 3) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp245 Register VReg1 = MIB.getReg(1); in selectMergeValues() local
246 (void)VReg1; in selectMergeValues()
247 assert(MRI.getType(VReg1).getSizeInBits() == 32 && in selectMergeValues()
248 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectMergeValues()
277 Register VReg1 = MIB.getReg(1); in selectUnmergeValues() local
278 (void)VReg1; in selectUnmergeValues()
279 assert(MRI.getType(VReg1).getSizeInBits() == 32 && in selectUnmergeValues()
280 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectUnmergeValues()
H A DARMISelLowering.cpp10882 Register VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10887 unsigned VReg2 = VReg1; in EmitSjLjDispatchBlock()
10891 .addReg(VReg1) in EmitSjLjDispatchBlock()
10946 Register VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10948 .addReg(VReg1, RegState::Define) in EmitSjLjDispatchBlock()
10953 .addReg(VReg1) in EmitSjLjDispatchBlock()
11019 Register VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
11024 unsigned VReg2 = VReg1; in EmitSjLjDispatchBlock()
11028 .addReg(VReg1) in EmitSjLjDispatchBlock()
11048 .addReg(VReg1, RegState::Define) in EmitSjLjDispatchBlock()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp701 Register VReg1 = MRI->createVirtualRegister(&PPC::G8RC_and_G8RC_NOX0RegClass); in generateLoadForNewConst() local
703 BuildMI(*MF, MI->getDebugLoc(), get(PPC::ADDIStocHA8), VReg1) in generateLoadForNewConst()
727 .addReg(VReg1, getKillRegState(true)) in generateLoadForNewConst()