Searched refs:WaveSize (Results 1 – 4 of 4) sorted by relevance
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUSubtarget.cpp | 319 const unsigned WaveSize = getWavefrontSize(); in getMaxLocalMemSizeWithWaveCount() local 322 std::max(1u, (WorkGroupSize + WaveSize - 1) / WaveSize); in getMaxLocalMemSizeWithWaveCount() 343 const unsigned WaveSize = getWavefrontSize(); in getOccupancyWithLocalMemSize() local 358 const unsigned MaxGroupNumWaves = divideCeil(MaxWorkGroupSize, WaveSize); in getOccupancyWithLocalMemSize()
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H A D | SIMachineFunctionInfo.cpp | 380 unsigned WaveSize = ST.getWavefrontSize(); in allocateSGPRSpillToVGPRLane() local 385 if (NumLanes > WaveSize) in allocateSGPRSpillToVGPRLane() 396 unsigned LaneIndex = (NumSpillLanes % WaveSize); in allocateSGPRSpillToVGPRLane()
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H A D | AMDGPURegisterBankInfo.cpp | 1193 auto WaveSize = B.buildConstant(LLT::scalar(32), ST.getWavefrontSizeLog2()); in applyMappingDynStackAlloc() local 1194 auto ScaledSize = B.buildShl(IntPtrTy, AllocSize, WaveSize); in applyMappingDynStackAlloc() 4623 unsigned WaveSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping() local 4625 OpdsMapping[1] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, WaveSize); in getInstrMapping() 4626 OpdsMapping[3] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, WaveSize); in getInstrMapping()
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H A D | SIISelLowering.cpp | 4188 unsigned WaveSize = TRI->getRegSizeInBits(*Src2RC); in EmitInstrWithCustomInserter() local 4189 assert(WaveSize == 64 || WaveSize == 32); in EmitInstrWithCustomInserter() 4191 if (WaveSize == 64) { in EmitInstrWithCustomInserter() 4222 (WaveSize == 64) ? AMDGPU::S_CSELECT_B64 : AMDGPU::S_CSELECT_B32; in EmitInstrWithCustomInserter() 13058 unsigned WaveSize) { in hasCFUser() argument 13063 if (!IT || IT->getBitWidth() != WaveSize) in hasCFUser() 13097 Result = hasCFUser(U, Visited, WaveSize); in hasCFUser()
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