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Searched refs:cells (Results 1 – 25 of 148) sorted by relevance

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/openbsd/sys/dev/ofw/
H A Dofw_gpio.c90 uint32_t phandle = cells[0]; in gpio_controller_config_pin()
102 gpio_controller_get_pin(uint32_t *cells) in gpio_controller_get_pin() argument
105 uint32_t phandle = cells[0]; in gpio_controller_get_pin()
114 val = gc->gc_get_pin(gc->gc_cookie, &cells[1]); in gpio_controller_get_pin()
120 gpio_controller_set_pin(uint32_t *cells, int val) in gpio_controller_set_pin() argument
123 uint32_t phandle = cells[0]; in gpio_controller_set_pin()
131 gc->gc_set_pin(gc->gc_cookie, &cells[1], val); in gpio_controller_set_pin()
135 gpio_controller_next_pin(uint32_t *cells) in gpio_controller_next_pin() argument
138 uint32_t phandle = cells[0]; in gpio_controller_next_pin()
142 return cells + gc->gc_cells + 1; in gpio_controller_next_pin()
[all …]
H A Dofw_clock.c47 uint32_t phandle = cells[0]; in clock_get_frequency_cells()
81 uint32_t phandle = cells[0]; in clock_set_frequency_cells()
98 uint32_t phandle = cells[0]; in clock_set_parent_cells()
115 uint32_t phandle = cells[0]; in clock_enable_cells()
127 clock_next_clock(uint32_t *cells) in clock_next_clock() argument
129 uint32_t phandle = cells[0]; in clock_next_clock()
137 return cells + ncells + 1; in clock_next_clock()
356 uint32_t phandle = cells[0]; in reset_assert_cells()
368 reset_next_reset(uint32_t *cells) in reset_next_reset() argument
370 uint32_t phandle = cells[0]; in reset_next_reset()
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H A Dofw_misc.c217 uint32_t phandle = cells[0]; in phy_enable_cells()
239 phy_next_phy(uint32_t *cells) in phy_next_phy() argument
241 uint32_t phandle = cells[0]; in phy_next_phy()
249 return cells + ncells + 1; in phy_next_phy()
511 ps->ps_period = cells[2]; in pwm_init_state()
513 ps->ps_flags = cells[3]; in pwm_init_state()
1103 cells[i] = cell[1 + i]; in iommu_device_lookup()
1119 uint32_t *cells) in iommu_device_lookup_pci() argument
1250 uint32_t phandle = cells[0]; in mbox_channel_cells()
1282 return cells + ncells + 1; in mbox_next_mbox()
[all …]
H A Dofw_power.c41 power_domain_enable_cells(uint32_t *cells, int on) in power_domain_enable_cells() argument
44 uint32_t phandle = cells[0]; in power_domain_enable_cells()
52 pd->pd_enable(pd->pd_cookie, &cells[1], on); in power_domain_enable_cells()
56 power_domain_next_domain(uint32_t *cells) in power_domain_next_domain() argument
58 uint32_t phandle = cells[0]; in power_domain_next_domain()
66 return cells + ncells + 1; in power_domain_next_domain()
/openbsd/sys/arch/riscv64/dev/
H A Dmpfgpio.c152 uint32_t pin = cells[0]; in mpfgpio_config_pin()
176 uint32_t pin = cells[0]; in mpfgpio_get_pin()
212 uint32_t cells[2]; in mpfgpio_pin_read() local
214 cells[0] = pin; in mpfgpio_pin_read()
215 cells[1] = 0; in mpfgpio_pin_read()
224 uint32_t cells[2]; in mpfgpio_pin_write() local
226 cells[0] = pin; in mpfgpio_pin_write()
227 cells[1] = 0; in mpfgpio_pin_write()
236 uint32_t cells[2]; in mpfgpio_pin_ctl() local
239 cells[0] = pin; in mpfgpio_pin_ctl()
[all …]
H A Dstfpinctrl.c187 uint32_t pin = cells[0]; in stfpinctrl_jh7100_config_pin()
209 stfpinctrl_jh7100_get_pin(void *cookie, uint32_t *cells) in stfpinctrl_jh7100_get_pin() argument
212 uint32_t pin = cells[0]; in stfpinctrl_jh7100_get_pin()
213 uint32_t flags = cells[1]; in stfpinctrl_jh7100_get_pin()
231 uint32_t pin = cells[0]; in stfpinctrl_jh7100_set_pin()
232 uint32_t flags = cells[1]; in stfpinctrl_jh7100_set_pin()
249 uint32_t pin = cells[0]; in stfpinctrl_jh7110_config_pin()
283 uint32_t pin = cells[0]; in stfpinctrl_jh7110_get_pin()
284 uint32_t flags = cells[1]; in stfpinctrl_jh7110_get_pin()
303 uint32_t pin = cells[0]; in stfpinctrl_jh7110_set_pin()
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H A Dstfclock.c329 uint32_t idx = cells[0]; in stfclock_get_frequency_jh7100()
453 uint32_t idx = cells[0]; in stfclock_set_frequency_jh7100()
464 uint32_t idx = cells[0]; in stfclock_enable_jh7100()
499 uint32_t idx = cells[0]; in stfclock_get_frequency_jh7110_aon()
555 uint32_t idx = cells[0]; in stfclock_set_frequency_jh7110_aon()
603 uint32_t idx = cells[0]; in stfclock_enable_jh7110_aon()
629 uint32_t idx = cells[0]; in stfclock_reset_jh7110_aon()
645 uint32_t idx = cells[0]; in stfclock_get_frequency_jh7110_pll()
724 uint32_t idx = cells[0]; in stfclock_set_frequency_jh7110_pll()
785 uint32_t idx = cells[0]; in stfclock_enable_jh7110_pll()
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/openbsd/sys/dev/fdt/
H A Dbcm2835_gpio.c239 uint32_t pin = cells[0]; in bcmgpio_config_pin()
260 uint32_t pin = cells[0]; in bcmgpio_get_pin()
311 uint32_t cells[2]; in bcmgpio_pin_read() local
313 cells[0] = pin; in bcmgpio_pin_read()
314 cells[1] = 0; in bcmgpio_pin_read()
323 uint32_t cells[2]; in bcmgpio_pin_write() local
325 cells[0] = pin; in bcmgpio_pin_write()
326 cells[1] = 0; in bcmgpio_pin_write()
335 uint32_t cells[2]; in bcmgpio_pin_ctl() local
338 cells[0] = pin; in bcmgpio_pin_ctl()
[all …]
H A Dsxipio.c501 uint32_t cells[3]; in sxipio_pin_read() local
503 cells[0] = gpio->port; in sxipio_pin_read()
504 cells[1] = pin; in sxipio_pin_read()
505 cells[2] = 0; in sxipio_pin_read()
514 uint32_t cells[3]; in sxipio_pin_write() local
516 cells[0] = gpio->port; in sxipio_pin_write()
517 cells[1] = pin; in sxipio_pin_write()
518 cells[2] = 0; in sxipio_pin_write()
527 uint32_t cells[3]; in sxipio_pin_ctl() local
530 cells[1] = pin; in sxipio_pin_ctl()
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H A Dmvclock.c132 ap806_get_frequency(void *cookie, uint32_t *cells) in ap806_get_frequency() argument
134 uint32_t idx = cells[0]; in ap806_get_frequency()
172 uint32_t mod = cells[0]; in cp110_get_frequency()
173 uint32_t idx = cells[1]; in cp110_get_frequency()
227 uint32_t mod = cells[0]; in cp110_enable()
228 uint32_t idx = cells[1]; in cp110_enable()
308 uint32_t idx = cells[0]; in a3700_periph_nb_enable()
330 uint32_t idx = cells[0]; in a3700_periph_nb_get_frequency()
360 uint32_t idx = cells[0]; in a3700_periph_sb_enable()
382 uint32_t idx = cells[0]; in a3700_periph_sb_get_frequency()
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H A Dhiclock.c185 hiclock_get_frequency(void *cookie, uint32_t *cells) in hiclock_get_frequency() argument
187 uint32_t idx = cells[0]; in hiclock_get_frequency()
194 hiclock_enable(void *cookie, uint32_t *cells, int on) in hiclock_enable() argument
196 uint32_t idx = cells[0]; in hiclock_enable()
226 hi3670_crgctrl_get_frequency(void *cookie, uint32_t *cells) in hi3670_crgctrl_get_frequency() argument
229 uint32_t idx = cells[0]; in hi3670_crgctrl_get_frequency()
287 hi3670_crgctrl_enable(void *cookie, uint32_t *cells, int on) in hi3670_crgctrl_enable() argument
289 uint32_t idx = cells[0]; in hi3670_crgctrl_enable()
309 hi3670_stub_get_frequency(void *cookie, uint32_t *cells) in hi3670_stub_get_frequency() argument
312 uint32_t idx = cells[0]; in hi3670_stub_get_frequency()
[all …]
H A Dplgpio.c104 plgpio_config_pin(void *cookie, uint32_t *cells, int config) in plgpio_config_pin() argument
107 uint32_t pin = cells[0]; in plgpio_config_pin()
119 plgpio_get_pin(void *cookie, uint32_t *cells) in plgpio_get_pin() argument
122 uint32_t pin = cells[0]; in plgpio_get_pin()
123 uint32_t flags = cells[1]; in plgpio_get_pin()
138 plgpio_set_pin(void *cookie, uint32_t *cells, int val) in plgpio_set_pin() argument
141 uint32_t pin = cells[0]; in plgpio_set_pin()
142 uint32_t flags = cells[1]; in plgpio_set_pin()
H A Dmvgpio.c101 mvgpio_config_pin(void *cookie, uint32_t *cells, int config) in mvgpio_config_pin() argument
104 uint32_t pin = cells[0]; in mvgpio_config_pin()
116 mvgpio_get_pin(void *cookie, uint32_t *cells) in mvgpio_get_pin() argument
119 uint32_t pin = cells[0]; in mvgpio_get_pin()
120 uint32_t flags = cells[1]; in mvgpio_get_pin()
137 mvgpio_set_pin(void *cookie, uint32_t *cells, int val) in mvgpio_set_pin() argument
140 uint32_t pin = cells[0]; in mvgpio_set_pin()
141 uint32_t flags = cells[1]; in mvgpio_set_pin()
H A Dqcgpio_fdt.c167 uint32_t pin = cells[0]; in qcgpio_fdt_config_pin()
179 qcgpio_fdt_get_pin(void *cookie, uint32_t *cells) in qcgpio_fdt_get_pin() argument
182 uint32_t pin = cells[0]; in qcgpio_fdt_get_pin()
183 uint32_t flags = cells[1]; in qcgpio_fdt_get_pin()
198 qcgpio_fdt_set_pin(void *cookie, uint32_t *cells, int val) in qcgpio_fdt_set_pin() argument
201 uint32_t pin = cells[0]; in qcgpio_fdt_set_pin()
202 uint32_t flags = cells[1]; in qcgpio_fdt_set_pin()
226 icells[0] = cells[0]; in qcgpio_fdt_intr_establish_pin()
233 qcgpio_fdt_intr_establish(void *cookie, int *cells, int ipl, in qcgpio_fdt_intr_establish() argument
238 int pin = cells[0]; in qcgpio_fdt_intr_establish()
[all …]
H A Dehci_fdt.c216 ehci_next_phy(uint32_t *cells) in ehci_next_phy() argument
218 uint32_t phandle = cells[0]; in ehci_next_phy()
226 return cells + ncells + 1; in ehci_next_phy()
230 ehci_init_phy(struct ehci_fdt_softc *sc, uint32_t *cells) in ehci_init_phy() argument
236 node = OF_getnodebyphandle(cells[0]); in ehci_init_phy()
242 ehci_phys[i].init(sc, cells); in ehci_init_phy()
354 node = OF_getnodebyphandle(cells[0]); in sun4i_phy_init()
360 cells[1] != 2) in sun4i_phy_init()
405 snprintf(name, sizeof(name), "usb%d_phy", cells[1]); in sun4i_phy_init()
409 snprintf(name, sizeof(name), "usb%d_reset", cells[1]); in sun4i_phy_init()
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/openbsd/sys/arch/octeon/octeon/
H A Dcn3xxx.dts38 #address-cells = <2>;
39 #size-cells = <2>;
44 #address-cells = <2>;
45 #size-cells = <2>;
51 #interrupt-cells = <2>;
57 #address-cells = <1>;
58 #size-cells = <0>;
64 #address-cells = <1>;
65 #size-cells = <0>;
70 #address-cells = <1>;
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/openbsd/sys/arch/arm64/stand/efiboot/
H A Dacpi.dts7 #address-cells = <2>;
8 #size-cells = <2>;
19 #address-cells = <2>;
20 #size-cells = <0>;
37 #interrupt-cells = <3>;
38 #address-cells = <2>;
39 #size-cells = <2>;
/openbsd/regress/usr.bin/mandoc/mdoc/Bl/
H A Dcolumn.out_lint2 mandoc: column.in:73:2: WARNING: wrong number of cells: 2 columns, 1 cells
4 mandoc: column.in:77:2: WARNING: wrong number of cells: 2 columns, 4 cells
5 mandoc: column.in:78:2: WARNING: wrong number of cells: 2 columns, 5 cells
/openbsd/sys/arch/armv7/omap/
H A Domclock.c115 omclock_get_frequency(void *cookie, uint32_t *cells) in omclock_get_frequency() argument
117 printf("%s: 0x%08x 0x%08x\n", __func__, cells[0], cells[1]); in omclock_get_frequency()
122 omclock_set_frequency(void *cookie, uint32_t *cells, uint32_t freq) in omclock_set_frequency() argument
124 printf("%s: 0x%08x 0x%08x\n", __func__, cells[0], cells[1]); in omclock_set_frequency()
129 omclock_enable(void *cookie, uint32_t *cells, int on) in omclock_enable() argument
132 uint32_t base = cells[0]; in omclock_enable()
133 uint32_t idx = cells[1]; in omclock_enable()
/openbsd/gnu/llvm/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_addrhashmap.h58 Cell cells[1]; // variable len member
120 Cell *c = &bucket->cells[i]; in ForEach()
130 Cell *c = &add->cells[i]; in ForEach()
225 Cell *c = &b->cells[i]; in acquire()
238 Cell *c = &add->cells[i]; in acquire()
254 Cell *c = &b->cells[i]; in acquire()
270 Cell *c = &add->cells[i]; in acquire()
294 Cell *c = &b->cells[i]; in acquire()
320 internal_memcpy(add1->cells, add->cells, add->size * sizeof(add->cells[0])); in acquire()
327 Cell *c = &add->cells[i]; in acquire()
[all …]
/openbsd/usr.bin/tmux/
H A Dlayout.c59 TAILQ_INIT(&lc->cells); in layout_create_cell()
80 while (!TAILQ_EMPTY(&lc->cells)) { in layout_free_cell()
81 lcchild = TAILQ_FIRST(&lc->cells); in layout_free_cell()
82 TAILQ_REMOVE(&lc->cells, lcchild, entry); in layout_free_cell()
121 TAILQ_FOREACH(lcchild, &lc->cells, entry) in layout_print_cell()
134 TAILQ_FOREACH(lcchild, &lc->cells, entry) { in layout_search_by_border()
181 TAILQ_INIT(&lc->cells); in layout_make_leaf()
194 TAILQ_INIT(&lc->cells); in layout_make_node()
250 lc != TAILQ_FIRST(&next->cells)) in layout_cell_is_top()
484 if (lc == TAILQ_FIRST(&lcparent->cells)) in layout_destroy_cell()
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H A Dlayout-set.c163 TAILQ_INSERT_TAIL(&lc->cells, lcnew, entry); in layout_set_even()
254 TAILQ_INSERT_TAIL(&lc->cells, lcmain, entry); in layout_set_main_h()
262 TAILQ_INSERT_TAIL(&lc->cells, lcother, entry); in layout_set_main_h()
265 TAILQ_INSERT_TAIL(&lc->cells, lcother, entry); in layout_set_main_h()
354 TAILQ_INSERT_TAIL(&lc->cells, lcother, entry); in layout_set_main_h_mirrored()
357 TAILQ_INSERT_TAIL(&lc->cells, lcother, entry); in layout_set_main_h_mirrored()
375 TAILQ_INSERT_TAIL(&lc->cells, lcmain, entry); in layout_set_main_h_mirrored()
450 TAILQ_INSERT_TAIL(&lc->cells, lcmain, entry); in layout_set_main_v()
571 TAILQ_INSERT_TAIL(&lc->cells, lcmain, entry); in layout_set_main_v_mirrored()
637 TAILQ_INSERT_TAIL(&lc->cells, lcrow, entry); in layout_set_tiled()
[all …]
/openbsd/lib/libcurses/widechar/
H A Dlib_ins_wch.c54 int cells = _nc_wacs_width(CharOf(CHDEREF(wch))); in NCURSES_EXPORT() local
57 if (cells < 0) { in NCURSES_EXPORT()
60 if (cells == 0) in NCURSES_EXPORT()
61 cells = 1; in NCURSES_EXPORT()
68 NCURSES_CH_T *temp2 = temp1 - cells; in NCURSES_EXPORT()
75 for (cell = 1; cell < cells; ++cell) { in NCURSES_EXPORT()
79 win->_curx = (NCURSES_SIZE_T) (win->_curx + cells); in NCURSES_EXPORT()
/openbsd/sys/arch/octeon/dev/
H A Doctgpio.c139 octgpio_config_pin(void *cookie, uint32_t *cells, int config) in octgpio_config_pin() argument
143 uint32_t pin = cells[0]; in octgpio_config_pin()
177 octgpio_get_pin(void *cookie, uint32_t *cells) in octgpio_get_pin() argument
180 uint32_t pin = cells[0]; in octgpio_get_pin()
181 uint32_t flags = cells[1]; in octgpio_get_pin()
194 octgpio_set_pin(void *cookie, uint32_t *cells, int value) in octgpio_set_pin() argument
197 uint32_t pin = cells[0]; in octgpio_set_pin()
198 uint32_t flags = cells[1]; in octgpio_set_pin()
/openbsd/sys/arch/armv7/exynos/
H A Dexclock.c165 exynos5250_get_frequency(void *cookie, uint32_t *cells) in exynos5250_get_frequency() argument
168 uint32_t idx = cells[0]; in exynos5250_get_frequency()
180 exynos5250_set_frequency(void *cookie, uint32_t *cells, uint32_t freq) in exynos5250_set_frequency() argument
182 uint32_t idx = cells[0]; in exynos5250_set_frequency()
194 exynos5250_enable(void *cookie, uint32_t *cells, int on) in exynos5250_enable() argument
196 uint32_t idx = cells[0]; in exynos5250_enable()
232 exynos5420_get_frequency(void *cookie, uint32_t *cells) in exynos5420_get_frequency() argument
235 uint32_t idx = cells[0]; in exynos5420_get_frequency()
304 uint32_t idx = cells[0]; in exynos5420_set_frequency()
317 exynos5420_enable(void *cookie, uint32_t *cells, int on) in exynos5420_enable() argument
[all …]

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