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Searched refs:dfixed_const (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/radeon/
H A Drs690.c128 tmp.full = dfixed_const(4); in rs690_pm_info()
133 tmp.full = dfixed_const(5); in rs690_pm_info()
302 a.full = dfixed_const(16); in rs690_crtc_bandwidth_compute()
332 b.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
336 c.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
342 a.full = dfixed_const(1); in rs690_crtc_bandwidth_compute()
386 a.full = dfixed_const(16); in rs690_crtc_bandwidth_compute()
397 a.full = dfixed_const(10); in rs690_crtc_bandwidth_compute()
409 a.full = dfixed_const(3); in rs690_crtc_bandwidth_compute()
413 a.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
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H A Drv515.c949 a.full = dfixed_const(100); in rv515_crtc_bandwidth_compute()
959 c.full = dfixed_const(256); in rv515_crtc_bandwidth_compute()
976 b.full = dfixed_const(1000); in rv515_crtc_bandwidth_compute()
980 b.full = dfixed_const(2); in rv515_crtc_bandwidth_compute()
984 c.full = dfixed_const(2); in rv515_crtc_bandwidth_compute()
990 a.full = dfixed_const(1); in rv515_crtc_bandwidth_compute()
1030 a.full = dfixed_const(3); in rv515_crtc_bandwidth_compute()
1061 a.full = dfixed_const(16); in rv515_crtc_bandwidth_compute()
1072 a.full = dfixed_const(16); in rv515_crtc_bandwidth_compute()
1107 a.full = dfixed_const(16); in rv515_compute_mode_priority()
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H A Devergreen.c1960 a.full = dfixed_const(10); in evergreen_dram_bandwidth()
1980 a.full = dfixed_const(10); in evergreen_dram_bandwidth_for_display()
1999 a.full = dfixed_const(10); in evergreen_data_return_bandwidth()
2002 a.full = dfixed_const(32); in evergreen_data_return_bandwidth()
2019 a.full = dfixed_const(10); in evergreen_dmif_request_bandwidth()
2022 a.full = dfixed_const(32); in evergreen_dmif_request_bandwidth()
2080 a.full = dfixed_const(2); in evergreen_latency_watermark()
2081 b.full = dfixed_const(1); in evergreen_latency_watermark()
2136 a.full = dfixed_const(1); in evergreen_check_latency_hiding()
2264 a.full = dfixed_const(16); in evergreen_program_watermarks()
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H A Dsi.c2075 a.full = dfixed_const(1000); in dce6_dram_bandwidth()
2079 a.full = dfixed_const(10); in dce6_dram_bandwidth()
2099 a.full = dfixed_const(10); in dce6_dram_bandwidth_for_display()
2118 a.full = dfixed_const(10); in dce6_data_return_bandwidth()
2121 a.full = dfixed_const(32); in dce6_data_return_bandwidth()
2153 a.full = dfixed_const(10); in dce6_dmif_request_bandwidth()
2217 a.full = dfixed_const(2); in dce6_latency_watermark()
2218 b.full = dfixed_const(1); in dce6_latency_watermark()
2275 a.full = dfixed_const(1); in dce6_check_latency_hiding()
2408 a.full = dfixed_const(16); in dce6_program_watermarks()
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H A Dr100.c3282 temp_ff.full = dfixed_const(temp); in r100_bandwidth_update()
3289 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()
3296 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()
3346 trp_ff.full = dfixed_const(mem_trp); in r100_bandwidth_update()
3429 k1.full = dfixed_const(40); in r100_bandwidth_update()
3432 k1.full = dfixed_const(20); in r100_bandwidth_update()
3436 k1.full = dfixed_const(40); in r100_bandwidth_update()
3440 temp_ff.full = dfixed_const(2); in r100_bandwidth_update()
3442 temp_ff.full = dfixed_const(c); in r100_bandwidth_update()
3444 temp_ff.full = dfixed_const(4); in r100_bandwidth_update()
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H A Dcik.c8932 a.full = dfixed_const(1000); in dce8_dram_bandwidth()
8936 a.full = dfixed_const(10); in dce8_dram_bandwidth()
8961 a.full = dfixed_const(1000); in dce8_dram_bandwidth_for_display()
8965 a.full = dfixed_const(10); in dce8_dram_bandwidth_for_display()
8993 a.full = dfixed_const(10); in dce8_data_return_bandwidth()
8996 a.full = dfixed_const(32); in dce8_data_return_bandwidth()
9022 a.full = dfixed_const(32); in dce8_dmif_request_bandwidth()
9025 a.full = dfixed_const(10); in dce8_dmif_request_bandwidth()
9113 a.full = dfixed_const(2); in dce8_latency_watermark()
9114 b.full = dfixed_const(1); in dce8_latency_watermark()
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H A Dradeon_display.c1757 a.full = dfixed_const(src_v); in radeon_crtc_scaling_mode_fixup()
1758 b.full = dfixed_const(dst_v); in radeon_crtc_scaling_mode_fixup()
1760 a.full = dfixed_const(src_h); in radeon_crtc_scaling_mode_fixup()
1761 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()
1764 radeon_crtc->vsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
1765 radeon_crtc->hsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
H A Dradeon_device.c744 a.full = dfixed_const(100); in radeon_update_bandwidth_info()
745 rdev->pm.sclk.full = dfixed_const(sclk); in radeon_update_bandwidth_info()
747 rdev->pm.mclk.full = dfixed_const(mclk); in radeon_update_bandwidth_info()
751 a.full = dfixed_const(16); in radeon_update_bandwidth_info()
/openbsd/sys/dev/pci/drm/include/drm/
H A Ddrm_fixed.h36 #define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */ macro
41 #define dfixed_init(A) { .full = dfixed_const((A)) }
50 return dfixed_const(non_frac); in dfixed_floor()
57 if (A.full > dfixed_const(non_frac)) in dfixed_ceil()
58 return dfixed_const(non_frac + 1); in dfixed_ceil()
60 return dfixed_const(non_frac); in dfixed_ceil()
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Ddce_v6_0.c532 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth()
561 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth_for_display()
589 a.full = dfixed_const(10); in dce_v6_0_data_return_bandwidth()
592 a.full = dfixed_const(32); in dce_v6_0_data_return_bandwidth()
618 a.full = dfixed_const(32); in dce_v6_0_dmif_request_bandwidth()
621 a.full = dfixed_const(10); in dce_v6_0_dmif_request_bandwidth()
709 a.full = dfixed_const(2); in dce_v6_0_latency_watermark()
710 b.full = dfixed_const(1); in dce_v6_0_latency_watermark()
798 a.full = dfixed_const(1); in dce_v6_0_check_latency_hiding()
939 a.full = dfixed_const(16); in dce_v6_0_program_watermarks()
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H A Ddce_v8_0.c663 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth()
667 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth()
692 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth_for_display()
696 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth_for_display()
724 a.full = dfixed_const(10); in dce_v8_0_data_return_bandwidth()
727 a.full = dfixed_const(32); in dce_v8_0_data_return_bandwidth()
753 a.full = dfixed_const(32); in dce_v8_0_dmif_request_bandwidth()
756 a.full = dfixed_const(10); in dce_v8_0_dmif_request_bandwidth()
844 a.full = dfixed_const(2); in dce_v8_0_latency_watermark()
845 b.full = dfixed_const(1); in dce_v8_0_latency_watermark()
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H A Ddce_v10_0.c724 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth()
728 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth()
753 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth_for_display()
757 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth_for_display()
785 a.full = dfixed_const(10); in dce_v10_0_data_return_bandwidth()
788 a.full = dfixed_const(32); in dce_v10_0_data_return_bandwidth()
814 a.full = dfixed_const(32); in dce_v10_0_dmif_request_bandwidth()
817 a.full = dfixed_const(10); in dce_v10_0_dmif_request_bandwidth()
905 a.full = dfixed_const(2); in dce_v10_0_latency_watermark()
906 b.full = dfixed_const(1); in dce_v10_0_latency_watermark()
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H A Ddce_v11_0.c756 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth()
760 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth()
785 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth_for_display()
789 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth_for_display()
817 a.full = dfixed_const(10); in dce_v11_0_data_return_bandwidth()
820 a.full = dfixed_const(32); in dce_v11_0_data_return_bandwidth()
846 a.full = dfixed_const(32); in dce_v11_0_dmif_request_bandwidth()
849 a.full = dfixed_const(10); in dce_v11_0_dmif_request_bandwidth()
937 a.full = dfixed_const(2); in dce_v11_0_latency_watermark()
938 b.full = dfixed_const(1); in dce_v11_0_latency_watermark()
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H A Damdgpu_display.c1464 a.full = dfixed_const(src_v); in amdgpu_display_crtc_scaling_mode_fixup()
1465 b.full = dfixed_const(dst_v); in amdgpu_display_crtc_scaling_mode_fixup()
1467 a.full = dfixed_const(src_h); in amdgpu_display_crtc_scaling_mode_fixup()
1468 b.full = dfixed_const(dst_h); in amdgpu_display_crtc_scaling_mode_fixup()
1471 amdgpu_crtc->vsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()
1472 amdgpu_crtc->hsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()