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Searched refs:dm_dram_clock_change_unsupported (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dml/
H A Ddisplay_mode_enums.h141 dm_dram_clock_change_unsupported enumerator
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c388 …ext->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_change_unsupported; in dcn30_fpu_calculate_wm_and_dlg()
417 …ext->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_change_unsupported; in dcn30_fpu_calculate_wm_and_dlg()
487 dm_dram_clock_change_unsupported) { in dcn30_fpu_calculate_wm_and_dlg()
H A Ddisplay_mode_vba_30.c5389 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in CalculateWatermarksAndDRAMSpeedChangeSupport()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c276 if (temp_clock_change_support != dm_dram_clock_change_unsupported) in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
283 if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported && in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
288 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
1192 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported || in dcn32_full_validate_bw_helper()
1242 if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) { in dcn32_full_validate_bw_helper()
1270 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported; in dcn32_full_validate_bw_helper()
1368 != dm_dram_clock_change_unsupported; in dcn32_calculate_dlg_params()
1681 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported))) { in dcn32_internal_validate_bw()
1970 dm_dram_clock_change_unsupported; in dcn32_calculate_wm_and_dlg_fpu()
2162 dm_dram_clock_change_unsupported) { in dcn32_calculate_wm_and_dlg_fpu()
H A Ddisplay_mode_vba_util_32.c4581 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4588 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4595 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
H A Ddisplay_mode_vba_32.c1711 || mode_lib->vba.DRAMClockChangeSupport[i][j] != dm_dram_clock_change_unsupported) in mode_support_configuration()
/openbsd/sys/dev/pci/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c805 dm_dram_clock_change_unsupported) { in get_mclk_switch_visual_confirm_color()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c1674 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported)) { in dcn30_internal_validate_bw()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1159 != dm_dram_clock_change_unsupported; in dcn20_calculate_dlg_params()
H A Ddisplay_mode_vba_20.c2591 dm_dram_clock_change_unsupported; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2595 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
H A Ddisplay_mode_vba_20v2.c2663 dm_dram_clock_change_unsupported; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2667 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c5206 && locals->DRAMClockChangeSupport[i][0] == dm_dram_clock_change_unsupported))))) { in dml21_ModeSupportAndSystemConfigurationFull()
5505 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in CalculateWatermarksAndDRAMSpeedChangeSupport()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c5744 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c5839 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;