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Searched refs:getNumRegs (Results 1 – 25 of 94) sorted by relevance

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/openbsd/gnu/llvm/llvm/tools/llvm-exegesis/lib/
H A DRegisterAliasing.cpp16 BitVector AliasedBits(RegInfo.getNumRegs()); in getAliasedBits()
28 : SourceBits(RegInfo.getNumRegs()), AliasedBits(RegInfo.getNumRegs()), in RegisterAliasingTracker()
29 Origins(RegInfo.getNumRegs()) {} in RegisterAliasingTracker()
63 EmptyRegisters(RegInfo.getNumRegs()) {} in RegisterAliasingTrackerCache()
H A DLlvmState.cpp118 std::make_unique<DenseMap<StringRef, unsigned>>(RegInfo.getNumRegs()); in createRegNameToRegNoMapping()
121 for (unsigned I = 1, E = RegInfo.getNumRegs(); I < E; ++I) in createRegNameToRegNoMapping()
123 assert(Map->size() == RegInfo.getNumRegs() && "Size prediction failed"); in createRegNameToRegNoMapping()
H A DParallelSnippetGenerator.cpp258 BitVector ImplicitUses(State.getRegInfo().getNumRegs()); in generateSnippetForInstrAvoidingDefUseOverlap()
259 BitVector ImplicitDefs(State.getRegInfo().getNumRegs()); in generateSnippetForInstrAvoidingDefUseOverlap()
276 BitVector Defs(State.getRegInfo().getNumRegs()); in generateSnippetForInstrAvoidingDefUseOverlap()
277 BitVector Uses(State.getRegInfo().getNumRegs()); in generateSnippetForInstrAvoidingDefUseOverlap()
/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/
H A DLivePhysRegs.h61 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
71 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
83 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in addReg()
93 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in removeReg()
H A DTargetRegisterInfo.h82 unsigned getNumRegs() const { return MC->getNumRegs(); } in getNumRegs() function
203 return OrderFunc ? OrderFunc(MF) : ArrayRef(begin(), getNumRegs()); in getRawAllocationOrder()
357 unsigned NumRegs = getNumRegs(); in getRegisterCosts()
/openbsd/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp98 (BestRC->hasSubClass(RC) && RC->getNumRegs() > BestRC->getNumRegs()))) in getMaximalPhysRegClass()
108 for (unsigned i = 0; i < TRC.getNumRegs(); ++i) { in getRegisterOrder()
125 BitVector Reserved(getNumRegs()); in getReservedRegs()
138 for (size_t Reg = 0, Total = getNumRegs(); Reg != Total; ++Reg) { in getReservedRegs()
/openbsd/gnu/llvm/llvm/lib/CodeGen/
H A DCriticalAntiDepBreaker.cpp45 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0), in CriticalAntiDepBreaker()
46 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {} in CriticalAntiDepBreaker()
52 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in StartBlock()
114 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
274 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in ScanInstruction()
473 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
527 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0); in BreakAntiDependencies()
H A DRegisterClassInfo.cpp83 CalleeSavedAliases.assign(TRI->getNumRegs(), 0); in runOnMachineFunction()
95 BitVector CSRHintsForAllocOrder(TRI->getNumRegs()); in runOnMachineFunction()
132 unsigned NumRegs = RC->getNumRegs(); in compute()
234 unsigned NReserved = RC->getNumRegs() - NAllocatableRegs; in computePSetLimit()
H A DRegUsageInfoCollector.cpp127 unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs()); in runOnMachineFunction()
154 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
181 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
H A DRDFRegisters.cpp30 RegInfos.resize(TRI.getNumRegs()); in PhysicalRegisterInfo()
32 BitVector BadRC(TRI.getNumRegs()); in PhysicalRegisterInfo()
87 for (unsigned I = 1, E = TRI.getNumRegs(); I != E; ++I) { in PhysicalRegisterInfo()
98 BitVector AS(TRI.getNumRegs()); in PhysicalRegisterInfo()
113 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) { in getAliasSet()
204 unsigned NumRegs = TRI.getNumRegs(); in aliasMM()
H A DTargetFrameLoweringImpl.cpp73 CalleeSaves.resize(TRI.getNumRegs()); in getCalleeSaves()
91 SavedRegs.resize(TRI.getNumRegs()); in determineCalleeSaves()
H A DMachineRegisterInfo.cpp46 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo()
77 if (NewRC->getNumRegs() < MinNumRegs) in constrainRegClass()
259 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) in verifyUseLists()
513 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()
605 assert(Reg && (Reg < TRI->getNumRegs()) && in disableCalleeSavedRegister()
H A DTargetRegisterInfo.cpp89 BitVector Checked(getNumRegs()); in checkAllSuperRegsMarked()
127 else if (Reg < TRI->getNumRegs()) { in printReg()
258 BitVector Allocatable(getNumRegs()); in getAllocatableSet()
494 unsigned N = (getNumRegs()+31) / 32; in regmaskSubsetEqual()
H A DExecutionDomainFix.cpp420 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
444 AliasMap.resize(TRI->getNumRegs()); in runOnMachineFunction()
445 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i) in runOnMachineFunction()
H A DRegisterUsageInfo.cpp93 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print()
H A DAggressiveAntiDepBreaker.cpp148 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); in StartBlock()
203 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
514 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters()
781 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
788 BitVector RegAliases(TRI->getNumRegs()); in BreakAntiDependencies()
H A DInterferenceCache.cpp43 if (PhysRegEntriesCount == TRI->getNumRegs()) return; in reinitPhysRegEntries()
45 PhysRegEntriesCount = TRI->getNumRegs(); in reinitPhysRegEntries()
/openbsd/gnu/llvm/llvm/tools/llvm-reduce/deltas/
H A DReduceRegisterMasks.cpp26 const unsigned NumRegs = TRI->getNumRegs(); in reduceMasksInFunction()
41 MachineOperand::getRegMaskSize(TRI->getNumRegs()); in reduceMasksInFunction()
/openbsd/gnu/llvm/llvm/lib/MC/
H A DMCRegisterInfo.cpp46 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); in getSubRegIndex()
120 report_fatal_error("unknown codeview register " + (RegNum < getNumRegs() in getCodeViewRegNum()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.cpp295 ReserveXRegister(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
296 ReserveXRegisterForRA(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
297 CustomCallSavedXRegs(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
H A DAArch64RegisterInfo.cpp184 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCalleeSavedRegs()
307 unsigned RegMaskSize = MachineOperand::getRegMaskSize(getNumRegs()); in UpdateCustomCallPreservedMask()
310 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCallPreservedMask()
389 BitVector Reserved(getNumRegs()); in getStrictlyReservedRegs()
408 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) { in getStrictlyReservedRegs()
437 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) { in getReservedRegs()
/openbsd/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVRegisterInfo.cpp25 return BitVector(getNumRegs()); in getReservedRegs()
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp344 : TRI(TRI), Defs(TRI.getNumRegs(), false), Uses(TRI.getNumRegs(), false) {} in RegDefsUses()
375 BitVector CallerSavedRegs(TRI.getNumRegs(), true); in setCallerSaved()
410 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs()); in update()
/openbsd/gnu/llvm/llvm/include/llvm/MC/
H A DMCRegisterInfo.h57 unsigned getNumRegs() const { return RegsSize; } in getNumRegs() function
62 assert(i < getNumRegs() && "Register number out of range!"); in getRegister()
491 unsigned getNumRegs() const { in getNumRegs() function
/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp259 BitVector Reserved(getNumRegs()); in getReservedRegs()
428 BitVector PhysClobbered(getNumRegs()); in shouldCoalesce()
444 if (PhysClobbered.count() > (NewRC->getNumRegs() - DemandedFreeGR128)) in shouldCoalesce()

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