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Searched refs:min_freq (Results 1 – 25 of 25) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/gt/
H A Dselftest_slpc.c120 *max_act_freq = slpc->min_freq; in vary_max_freq()
150 u32 step, min_freq, req_freq; in vary_min_freq() local
156 *max_act_freq = slpc->min_freq; in vary_min_freq()
157 for (min_freq = slpc->min_freq; min_freq < slpc->rp0_freq; in vary_min_freq()
158 min_freq += step) { in vary_min_freq()
159 err = slpc_set_min_freq(slpc, min_freq); in vary_min_freq()
168 min_freq - FREQUENCY_REQ_UNIT); in vary_min_freq()
200 min.freq = slpc->min_freq; in slpc_power()
230 slpc_set_min_freq(slpc, slpc->min_freq); in slpc_power()
276 if (slpc->min_freq == slpc->rp0_freq) { in run_test()
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H A Dselftest_rps.c433 if (rps_set_check(rps, rps->min_freq) != rps->min_freq) { in live_rps_control()
450 if (rps_set_check(rps, rps->min_freq) != rps->min_freq) { in live_rps_control()
473 rps->min_freq, intel_gpu_freq(rps, rps->min_freq), in live_rps_control()
478 if (limit == rps->min_freq) { in live_rps_control()
511 min_gpu_freq = rps->min_freq; in show_pcu_config()
672 min.freq = rps->min_freq; in live_rps_frequency_cs()
810 min.freq = rps->min_freq; in live_rps_frequency_srm()
903 rps_set_check(rps, rps->min_freq); in __rps_up_interrupt()
952 if (rps->cur_freq != rps->min_freq) { in __rps_up_interrupt()
1193 min.freq = rps->min_freq; in live_rps_power()
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H A Dintel_rps.c310 rps->min_freq = fmax; in gen5_rps_init()
427 val = rps->min_freq + val; in gen5_invert_freq()
1180 rps->min_freq = caps.min_freq; in gen6_rps_init()
1199 rps->min_freq, in gen6_rps_init()
1712 intel_gpu_freq(rps, rps->min_freq), rps->min_freq); in vlv_rps_init()
1746 intel_gpu_freq(rps, rps->min_freq), rps->min_freq); in chv_rps_init()
2253 return slpc->min_freq;
2473 if (val < rps->min_freq ||
2539 freq = rps->min_freq;
2555 if (val < rps->min_freq ||
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H A Dintel_rps_types.h52 u8 min_freq; member
89 u8 min_freq; /* AKA RPn. Minimum frequency */ member
H A Dintel_llc.c101 const int min_freq = 15; in calc_ia_freq() local
112 if (gpu_freq < min_freq) in calc_ia_freq()
H A Dintel_gt_pm_debugfs.c385 intel_gpu_freq(rps, rps->min_freq)); in intel_gt_pm_frequency_dump()
430 min_gpu_freq = rps->min_freq; in llc_show()
502 intel_gpu_freq(rps, rps->min_freq), in rps_boost_show()
H A Dintel_gt_types.h84 u32 min_freq; member
H A Dintel_gt_sysfs_pm.c784 return sysfs_emit(buf, "%u\n", gt->defaults.min_freq); in default_min_freq_mhz_show()
/openbsd/sys/dev/pci/drm/i915/gt/uc/
H A Dintel_guc_slpc.c413 if (val < slpc->min_freq || in intel_guc_slpc_set_max_freq()
483 slpc->min_freq); in intel_guc_slpc_set_ignore_eff_freq()
507 if (val < slpc->min_freq || in intel_guc_slpc_set_min_freq()
613 slpc->min_freq_softlimit = slpc->min_freq; in slpc_set_softlimits()
614 slpc_to_gt(slpc)->defaults.min_freq = slpc->min_freq_softlimit; in slpc_set_softlimits()
649 (slpc_to_gt(slpc))->defaults.min_freq = slpc->min_freq_softlimit; in update_server_min_softlimit()
669 slpc->min_freq = intel_gpu_freq(rps, caps.min_freq); in slpc_get_rp_values()
784 if (val < slpc->min_freq || val > slpc->rp0_freq) in intel_guc_slpc_set_boost_freq()
H A Dintel_guc_slpc_types.h26 u32 min_freq; member
/openbsd/sys/arch/amd64/amd64/
H A Dtsc.c231 uint64_t count1, count2, frequency, min_freq, tsc1, tsc2; in measure_tsc_freq() local
241 min_freq = ULLONG_MAX; in measure_tsc_freq()
264 min_freq = MIN(min_freq, frequency); in measure_tsc_freq()
268 return (success > 1 ? min_freq : 0); in measure_tsc_freq()
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c696 uint32_t min_freq, max_freq, force_freq; in renoir_force_dpm_limit_value() local
707 ret = renoir_get_dpm_ultimate_freq(smu, clk_type, &min_freq, &max_freq); in renoir_force_dpm_limit_value()
711 force_freq = highest ? max_freq : min_freq; in renoir_force_dpm_limit_value()
723 uint32_t min_freq, max_freq; in renoir_unforce_dpm_levels() local
741 ret = renoir_get_dpm_ultimate_freq(smu, clk_type, &min_freq, &max_freq); in renoir_unforce_dpm_levels()
802 uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; in renoir_force_clk_levels() local
815 ret = renoir_get_dpm_ultimate_freq(smu, SMU_GFXCLK, &min_freq, &max_freq); in renoir_force_clk_levels()
819 soft_max_level == 0 ? min_freq : in renoir_force_clk_levels()
826 soft_min_level == 1 ? RENOIR_UMD_PSTATE_GFXCLK : min_freq, in renoir_force_clk_levels()
832 ret = renoir_get_dpm_clk_limited(smu, clk_type, soft_min_level, &min_freq); in renoir_force_clk_levels()
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/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c1034 uint32_t min_freq, max_freq = 0; in smu10_print_clock_levels() local
1075 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); in smu10_print_clock_levels()
1084 (data->gfx_actual_soft_min_freq > 0) ? data->gfx_actual_soft_min_freq : min_freq); in smu10_print_clock_levels()
1091 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); in smu10_print_clock_levels()
1100 min_freq, max_freq); in smu10_print_clock_levels()
1536 uint32_t min_freq, max_freq = 0; in smu10_set_fine_grain_clk_vol() local
1557 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); in smu10_set_fine_grain_clk_vol()
1561 if (input[1] < min_freq) { in smu10_set_fine_grain_clk_vol()
1563 input[1], min_freq); in smu10_set_fine_grain_clk_vol()
1586 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); in smu10_set_fine_grain_clk_vol()
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H A Dvega12_hwmgr.c1162 uint32_t min_freq; in vega12_upload_dpm_min_level() local
1166 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1169 (PPCLK_GFXCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
1176 min_freq = data->dpm_table.mem_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1179 (PPCLK_UCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
1187 (PPCLK_UCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
1198 (PPCLK_VCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
1207 (PPCLK_DCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
1218 (PPCLK_ECLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
1229 (PPCLK_SOCCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level()
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H A Dvega20_hwmgr.c1824 uint32_t min_freq; in vega20_upload_dpm_min_level() local
1829 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()
1832 (PPCLK_GFXCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
1840 min_freq = data->dpm_table.mem_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()
1843 (PPCLK_UCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
1855 (PPCLK_VCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
1864 (PPCLK_DCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
1876 (PPCLK_ECLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
1888 (PPCLK_SOCCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
1900 (PPCLK_FCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level()
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/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c1219 uint32_t min_freq = 0, max_freq = 0; in vangogh_force_clk_levels() local
1228 soft_min_level, &min_freq); in vangogh_force_clk_levels()
1242 min_freq, NULL); in vangogh_force_clk_levels()
1248 clk_type, soft_min_level, &min_freq); in vangogh_force_clk_levels()
1262 min_freq, NULL); in vangogh_force_clk_levels()
1268 clk_type, soft_min_level, &min_freq); in vangogh_force_clk_levels()
1280 min_freq << 16, NULL); in vangogh_force_clk_levels()
1293 clk_type, soft_min_level, &min_freq); in vangogh_force_clk_levels()
1304 min_freq, NULL); in vangogh_force_clk_levels()
1325 uint32_t min_freq, max_freq, force_freq; in vangogh_force_dpm_limit_value() local
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H A Dnavi10_ppt.c1669 uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; in navi10_force_clk_levels() local
1691 ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq); in navi10_force_clk_levels()
1699 ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); in navi10_force_clk_levels()
H A Dsienna_cichlid_ppt.c1433 uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; in sienna_cichlid_force_clk_levels() local
1451 ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq); in sienna_cichlid_force_clk_levels()
1459 ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); in sienna_cichlid_force_clk_levels()
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c952 uint32_t min_freq = 0, max_freq = 0; in smu_v13_0_5_force_clk_levels() local
961 ret = smu_v13_0_5_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq); in smu_v13_0_5_force_clk_levels()
969 ret = smu_v13_0_5_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); in smu_v13_0_5_force_clk_levels()
H A Dsmu_v13_0_4_ppt.c907 uint32_t min_freq = 0, max_freq = 0; in smu_v13_0_4_force_clk_levels() local
918 ret = smu_v13_0_4_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq); in smu_v13_0_4_force_clk_levels()
926 ret = smu_v13_0_4_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); in smu_v13_0_4_force_clk_levels()
H A Dyellow_carp_ppt.c1134 uint32_t min_freq = 0, max_freq = 0; in yellow_carp_force_clk_levels() local
1145 ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq); in yellow_carp_force_clk_levels()
1153 ret = yellow_carp_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); in yellow_carp_force_clk_levels()
H A Dsmu_v13_0_7_ppt.c1570 uint32_t min_freq, max_freq; in smu_v13_0_7_force_clk_levels() local
1624 min_freq = single_dpm_table->dpm_levels[soft_min_level].value; in smu_v13_0_7_force_clk_levels()
1629 min_freq, in smu_v13_0_7_force_clk_levels()
H A Dsmu_v13_0_0_ppt.c1589 uint32_t min_freq, max_freq; in smu_v13_0_0_force_clk_levels() local
1643 min_freq = single_dpm_table->dpm_levels[soft_min_level].value; in smu_v13_0_0_force_clk_levels()
1648 min_freq, in smu_v13_0_0_force_clk_levels()
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_debugfs.c1977 uint32_t max_freq, min_freq; in amdgpu_debugfs_sclk_set() local
1989 ret = amdgpu_dpm_get_dpm_freq_range(adev, PP_SCLK, &min_freq, &max_freq); in amdgpu_debugfs_sclk_set()
1994 if (ret || val > max_freq || val < min_freq) { in amdgpu_debugfs_sclk_set()
/openbsd/sys/dev/pci/drm/i915/
H A Di915_debugfs.c506 intel_gpu_freq(rps, rps->min_freq), in i915_rps_boost_info()