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Searched refs:mmMP0_SMN_C2PMSG_102 (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dpsp_v11_0_8.c77 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_8_ring_create()
151 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102); in psp_v11_0_8_ring_get_wptr()
163 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v11_0_8_ring_set_wptr()
H A Dpsp_v12_0.c194 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v12_0_ring_create()
322 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102); in psp_v12_0_ring_get_wptr()
334 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v12_0_ring_set_wptr()
H A Dpsp_v3_1.c206 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v3_1_ring_create()
357 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v3_1_ring_set_wptr()
H A Dpsp_v11_0.c306 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_ring_create()
582 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v11_0_ring_set_wptr()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 … macro
H A Dmp_12_0_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 … macro
H A Dmp_9_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 0x00a6 macro
H A Dmp_11_0_8_offset.h168 #define mmMP0_SMN_C2PMSG_102 … macro
H A Dmp_11_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 … macro
H A Dmp_11_5_0_offset.h168 #define mmMP0_SMN_C2PMSG_102 … macro