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Searched refs:mmMP1_SMN_C2PMSG_75 (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h268 #define mmMP1_SMN_C2PMSG_75 … macro
H A Dmp_12_0_0_offset.h268 #define mmMP1_SMN_C2PMSG_75 … macro
H A Dmp_9_0_offset.h280 #define mmMP1_SMN_C2PMSG_75 0x028b macro
H A Dmp_11_0_8_offset.h268 #define mmMP1_SMN_C2PMSG_75 … macro
H A Dmp_11_0_offset.h270 #define mmMP1_SMN_C2PMSG_75 … macro
H A Dmp_11_5_0_offset.h268 #define mmMP1_SMN_C2PMSG_75 … macro
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_0_ppt.c82 #define mmMP1_SMN_C2PMSG_75 … macro
2492 smu->debug_msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_75); in smu_v13_0_0_set_smu_mailbox_registers()