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Searched refs:mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_offset.h124 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h250 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW macro
H A Dvcn_2_5_offset.h261 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW macro
H A Dvcn_2_0_0_offset.h246 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW macro
H A Dvcn_3_0_0_offset.h489 #define mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Djpeg_v3_0.c365 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, in jpeg_v3_0_start()
H A Djpeg_v2_5.c358 WREG32_SOC15(JPEG, i, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, in jpeg_v2_5_start()
H A Djpeg_v1_0.c539 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr)); in jpeg_v1_0_start()
H A Djpeg_v2_0.c343 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, in jpeg_v2_0_start()
H A Dvcn_v1_0.c1318 WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, in vcn_v1_0_pause_dpg_mode()