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Searched refs:mmUVD_RB_WPTR2_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_offset.h93 #define mmUVD_RB_WPTR2_BASE_IDX … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h215 #define mmUVD_RB_WPTR2_BASE_IDX … macro
H A Dvcn_2_5_offset.h570 #define mmUVD_RB_WPTR2_BASE_IDX … macro
H A Dvcn_2_0_0_offset.h927 #define mmUVD_RB_WPTR2_BASE_IDX … macro
H A Dvcn_3_0_0_offset.h900 #define mmUVD_RB_WPTR2_BASE_IDX … macro