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Searched refs:opc2 (Results 1 – 12 of 12) sorted by relevance

/openbsd/gnu/usr.bin/binutils-2.17/cpu/
H A Dm32c.cpu2836 (ifield-assertion (eq (.sym f- base -2) opc2))
5926 (unary-insn-mach-g mach op opc1 opc2 opc3 sem "")
6023 (+ opc1 opc2 Dst16RnQI-S src16-2-S)
6030 (+ opc1 opc2 srcdst16-r0l-r0h-S)
6047 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
6061 (+ opc1 opc2 opc3 Imm-12-s4)
6533 (+ opc1 Imm1-S opc2 dst32-an-S)
6549 (+ opc1 Imm3-S opc2)
6565 (+ opc1 opc2 opc3 opc4 Imm-16-QI)
6581 (+ opc1 opc2 opc3 opc4 Imm-16-HI)
[all …]
/openbsd/gnu/usr.bin/binutils/opcodes/
H A Dia64-gen.c2602 opcodes_eq (opc1, opc2) in opcodes_eq() argument
2604 struct ia64_opcode *opc2;
2609 if ((opc1->mask != opc2->mask) || (opc1->type != opc2->type)
2610 || (opc1->num_outputs != opc2->num_outputs)
2611 || (opc1->flags != opc2->flags))
2615 if (opc1->operands[x] != opc2->operands[x])
2619 plen2 = get_prefix_len (opc2->name);
2621 if (plen1 == plen2 && (memcmp (opc1->name, opc2->name, plen1) == 0))
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A Dia64-gen.c2634 opcodes_eq (opc1, opc2) in opcodes_eq() argument
2636 struct ia64_opcode *opc2;
2641 if ((opc1->mask != opc2->mask) || (opc1->type != opc2->type)
2642 || (opc1->num_outputs != opc2->num_outputs)
2643 || (opc1->flags != opc2->flags))
2647 if (opc1->operands[x] != opc2->operands[x])
2651 plen2 = get_prefix_len (opc2->name);
2653 if (plen1 == plen2 && (memcmp (opc1->name, opc2->name, plen1) == 0))
/openbsd/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.td208 multiclass F3R_2RUS<bits<5> opc1, bits<5> opc2, string OpcStr, SDNode OpNode> {
212 def _2rus : _F2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
217 multiclass F3R_2RUS_np<bits<5> opc1, bits<5> opc2, string OpcStr> {
220 def _2rus : _F2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
224 multiclass F3R_2RBITP<bits<5> opc1, bits<5> opc2, string OpcStr,
229 def _2rus : _F2RUSBitp<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
245 multiclass FL3R_L2RUS<bits<9> opc1, bits<9> opc2, string OpcStr,
250 def _l2rus : _FL2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
256 multiclass FL3R_L2RBITP<bits<9> opc1, bits<9> opc2, string OpcStr,
261 def _l2rus : _FL2RUSBitp<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrInfo.td5377 timm:$CRm, timm:$opc2)]>,
5383 bits<3> opc2;
5388 let Inst{7-5} = opc2;
5408 bits<3> opc2;
5413 let Inst{7-5} = opc2;
5610 bits<3> opc2;
5617 let Inst{7-5} = opc2;
5637 imm0_7:$opc2), []>,
5657 bits<3> opc2;
5664 let Inst{7-5} = opc2;
[all …]
H A DARMInstrThumb2.td4539 bits<3> opc2;
4546 let Inst{7-5} = opc2;
4579 c_imm:$CRm, imm0_7:$opc2),
4581 timm:$CRm, timm:$opc2)]>,
4588 c_imm:$CRm, imm0_7:$opc2),
4590 timm:$CRm, timm:$opc2)]> {
4652 timm:$CRm, timm:$opc2)]> {
4659 bits<3> opc2;
4664 let Inst{7-5} = opc2;
4685 bits<3> opc2;
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrMMX.td51 multiclass MMXI_binop_rmi_int<bits<8> opc, bits<8> opc2, Format ImmForm,
65 def ri : MMXIi8<opc2, ImmForm, (outs VR64:$dst),
H A DX86InstrSSE.td3573 multiclass PDI_binop_rmi<bits<8> opc, bits<8> opc2, Format ImmForm,
3596 def ri : PDIi8<opc2, ImmForm, (outs RC:$dst),
3605 multiclass PDI_binop_rmi_all<bits<8> opc, bits<8> opc2, Format ImmForm,
3612 defm V#NAME : PDI_binop_rmi<opc, opc2, ImmForm, !strconcat("v", OpcodeStr),
3616 defm V#NAME#Y : PDI_binop_rmi<opc, opc2, ImmForm, !strconcat("v", OpcodeStr),
3621 defm NAME : PDI_binop_rmi<opc, opc2, ImmForm, OpcodeStr, OpNode, OpNode2,
H A DX86InstrAVX512.td3168 multiclass avx512_mask_shiftop_w<bits<8> opc1, bits<8> opc2, string OpcodeStr,
3176 defm Q : avx512_mask_shiftop<opc2, !strconcat(OpcodeStr, "q"), VK64, OpNode,
3178 defm D : avx512_mask_shiftop<opc2, !strconcat(OpcodeStr, "d"), VK32, OpNode,
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td2174 class BaseOneOperandData<bit sf, bit S, bits<5> opc2, bits<6> opc,
2187 let Inst{20-16} = opc2;
4621 class BaseMemTag<bits<2> opc1, bits<2> opc2, string asm_insn,
4631 let Inst{11-10} = opc2;
4661 class BaseMemTagStore<bits<2> opc1, bits<2> opc2, string asm_insn,
4663 : BaseMemTag<opc1, opc2, asm_insn, asm_opnds, cstr, oops, iops> {
11084 let Inst{12} = opc2;
11094 multiclass SIMDIndexedTiedComplexHSD<bit opc1, bit opc2, Operand rottype,
11105 def v8f16_indexed : BaseSIMDIndexedTiedComplex<1, 1, 0, 0b01, opc1, opc2,
11115 def v4f32_indexed : BaseSIMDIndexedTiedComplex<1, 1, 0, 0b10, opc1, opc2,
[all …]
H A DSVEInstrFormats.td2628 class sve_int_read_vl_a<bit op, bits<5> opc2, string asm, bit streaming_sve = 0b0>
2638 let Inst{20-16} = opc2{4-0};
H A DAArch64InstrInfo.td8685 // size opc opc2