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Searched refs:out_format (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/inc/hw/
H A Dmcif_wb.h99 enum dwb_scaler_mode out_format,
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_mmhubbub.c274 enum dwb_scaler_mode out_format, in mcifwb2_dump_frame() argument
292 dump_info->format = out_format; in mcifwb2_dump_frame()
H A Ddcn20_dwb.c256 REG_UPDATE_2(WBSCL_MODE, WBSCL_MODE, params->out_format, in dwb2_set_scaler()
259 if (params->out_format != dwb_scaler_mode_bypass444) { in dwb2_set_scaler()
H A Ddcn20_mmhubbub.h501 enum dwb_scaler_mode out_format,
H A Ddcn20_resource.c1630 …if (context->res_ctx.pipe_ctx[i].stream->writeback_info[j].dwb_params.out_format == dwb_scaler_mod… in dcn20_set_mcif_arb_params()
/openbsd/sys/dev/pci/drm/amd/display/dc/
H A Ddc_types.h435 enum dwb_scaler_mode out_format; /* default = YUV420 - TODO: limit this to 0 and 1 on dcn3 */ member
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1014 if (wb_info->dwb_params.out_format == dwb_scaler_mode_yuv420) { in dcn20_populate_dml_writeback_from_context()
2522 if (wb_info->dwb_params.out_format == dwb_scaler_mode_yuv420) { in dcn201_populate_dml_writeback_from_context_fpu()