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Searched refs:pd_addr (Results 1 – 25 of 51) sorted by relevance

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/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dvcn_sw_ring.c66 uint32_t vmid, uint64_t pd_addr) in vcn_dec_sw_ring_emit_vm_flush() argument
71 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_dec_sw_ring_emit_vm_flush()
75 data1 = lower_32_bits(pd_addr); in vcn_dec_sw_ring_emit_vm_flush()
H A Damdgpu_trace.h228 __field(u64, pd_addr)
237 __entry->pd_addr = job->vm_pd_addr;
242 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
418 uint64_t pd_addr),
419 TP_ARGS(ring, vmid, pd_addr),
424 __field(u64, pd_addr)
431 __entry->pd_addr = pd_addr;
435 __entry->vm_hub, __entry->pd_addr)
H A Dvcn_v2_0.h37 unsigned vmid, uint64_t pd_addr);
50 unsigned int vmid, uint64_t pd_addr);
H A Dvcn_sw_ring.h40 uint32_t vmid, uint64_t pd_addr);
H A Damdgpu_gmc.c129 uint64_t pd_addr; in amdgpu_gmc_pd_addr() local
135 amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags); in amdgpu_gmc_pd_addr()
136 pd_addr |= flags; in amdgpu_gmc_pd_addr()
138 pd_addr = amdgpu_bo_gpu_offset(bo); in amdgpu_gmc_pd_addr()
140 return pd_addr; in amdgpu_gmc_pd_addr()
H A Djpeg_v2_0.h57 unsigned vmid, uint64_t pd_addr);
H A Djpeg_v1_0.c384 unsigned vmid, uint64_t pd_addr) in jpeg_v1_0_decode_ring_emit_vm_flush() argument
389 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v1_0_decode_ring_emit_vm_flush()
393 data1 = lower_32_bits(pd_addr); in jpeg_v1_0_decode_ring_emit_vm_flush()
H A Djpeg_v2_0.c616 unsigned vmid, uint64_t pd_addr) in jpeg_v2_0_dec_ring_emit_vm_flush() argument
621 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v2_0_dec_ring_emit_vm_flush()
625 data1 = lower_32_bits(pd_addr); in jpeg_v2_0_dec_ring_emit_vm_flush()
H A Duvd_v7_0.c1400 unsigned vmid, uint64_t pd_addr) in uvd_v7_0_ring_emit_vm_flush() argument
1405 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v7_0_ring_emit_vm_flush()
1409 data1 = lower_32_bits(pd_addr); in uvd_v7_0_ring_emit_vm_flush()
1443 unsigned int vmid, uint64_t pd_addr) in uvd_v7_0_enc_ring_emit_vm_flush() argument
1447 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v7_0_enc_ring_emit_vm_flush()
1452 lower_32_bits(pd_addr), 0xffffffff); in uvd_v7_0_enc_ring_emit_vm_flush()
H A Dgmc_v11_0.c382 unsigned int vmid, uint64_t pd_addr) in gmc_v11_0_emit_flush_gpu_tlb() argument
405 lower_32_bits(pd_addr)); in gmc_v11_0_emit_flush_gpu_tlb()
409 upper_32_bits(pd_addr)); in gmc_v11_0_emit_flush_gpu_tlb()
426 return pd_addr; in gmc_v11_0_emit_flush_gpu_tlb()
H A Dvcn_v1_0.c1557 unsigned vmid, uint64_t pd_addr) in vcn_v1_0_dec_ring_emit_vm_flush() argument
1562 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_dec_ring_emit_vm_flush()
1566 data1 = lower_32_bits(pd_addr); in vcn_v1_0_dec_ring_emit_vm_flush()
1702 unsigned int vmid, uint64_t pd_addr) in vcn_v1_0_enc_ring_emit_vm_flush() argument
1706 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_enc_ring_emit_vm_flush()
1711 lower_32_bits(pd_addr), 0xffffffff); in vcn_v1_0_enc_ring_emit_vm_flush()
H A Dvcn_v2_0.c1512 unsigned vmid, uint64_t pd_addr) in vcn_v2_0_dec_ring_emit_vm_flush() argument
1517 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1521 data1 = lower_32_bits(pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1672 unsigned int vmid, uint64_t pd_addr) in vcn_v2_0_enc_ring_emit_vm_flush() argument
1676 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_enc_ring_emit_vm_flush()
1681 lower_32_bits(pd_addr), 0xffffffff); in vcn_v2_0_enc_ring_emit_vm_flush()
H A Dgmc_v10_0.c474 unsigned int vmid, uint64_t pd_addr) in gmc_v10_0_emit_flush_gpu_tlb() argument
497 lower_32_bits(pd_addr)); in gmc_v10_0_emit_flush_gpu_tlb()
501 upper_32_bits(pd_addr)); in gmc_v10_0_emit_flush_gpu_tlb()
518 return pd_addr; in gmc_v10_0_emit_flush_gpu_tlb()
H A Dgmc_v6_0.c354 unsigned int vmid, uint64_t pd_addr) in gmc_v6_0_emit_flush_gpu_tlb() argument
363 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
368 return pd_addr; in gmc_v6_0_emit_flush_gpu_tlb()
H A Dvce_v4_0.c1023 unsigned int vmid, uint64_t pd_addr) in vce_v4_0_emit_vm_flush() argument
1027 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vce_v4_0_emit_vm_flush()
1032 lower_32_bits(pd_addr), 0xffffffff); in vce_v4_0_emit_vm_flush()
H A Djpeg_v4_0_3.c847 unsigned int vmid, uint64_t pd_addr) in jpeg_v4_0_3_dec_ring_emit_vm_flush() argument
852 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v4_0_3_dec_ring_emit_vm_flush()
856 data1 = lower_32_bits(pd_addr); in jpeg_v4_0_3_dec_ring_emit_vm_flush()
H A Duvd_v6_0.c1072 unsigned vmid, uint64_t pd_addr) in uvd_v6_0_ring_emit_vm_flush() argument
1074 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v6_0_ring_emit_vm_flush()
1132 unsigned int vmid, uint64_t pd_addr) in uvd_v6_0_enc_ring_emit_vm_flush() argument
1136 amdgpu_ring_write(ring, pd_addr >> 12); in uvd_v6_0_enc_ring_emit_vm_flush()
H A Dgmc_v7_0.c474 unsigned int vmid, uint64_t pd_addr) in gmc_v7_0_emit_flush_gpu_tlb() argument
482 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
487 return pd_addr; in gmc_v7_0_emit_flush_gpu_tlb()
/openbsd/sys/dev/pci/drm/radeon/
H A Dradeon_trace.h108 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
109 TP_ARGS(pd_addr, ring, id),
111 __field(u64, pd_addr)
117 __entry->pd_addr = pd_addr;
122 __entry->pd_addr, __entry->ring, __entry->id)
H A Dsi_dma.c187 unsigned vm_id, uint64_t pd_addr) in si_dma_vm_flush() argument
196 radeon_ring_write(ring, pd_addr >> 12); in si_dma_vm_flush()
H A Dradeon_vm.c241 uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); in radeon_vm_flush() local
244 if (pd_addr != vm_id->pd_gpu_addr || !vm_id->flushed_updates || in radeon_vm_flush()
247 trace_radeon_vm_flush(pd_addr, ring, vm->ids[ring].id); in radeon_vm_flush()
250 vm_id->pd_gpu_addr = pd_addr; in radeon_vm_flush()
644 uint64_t pd_addr = radeon_bo_gpu_offset(pd); in radeon_vm_update_page_directory() local
679 pde = pd_addr + pt_idx * 8; in radeon_vm_update_page_directory()
H A Dni_dma.c449 unsigned vm_id, uint64_t pd_addr) in cayman_dma_vm_flush() argument
453 radeon_ring_write(ring, pd_addr >> 12); in cayman_dma_vm_flush()
H A Dradeon_asic.h614 unsigned vm_id, uint64_t pd_addr);
640 unsigned vm_id, uint64_t pd_addr);
722 unsigned vm_id, uint64_t pd_addr);
745 unsigned vm_id, uint64_t pd_addr);
829 unsigned vm_id, uint64_t pd_addr);
848 unsigned vm_id, uint64_t pd_addr);
/openbsd/sys/dev/pci/drm/i915/gt/
H A Dgen6_ppgtt.h18 gen6_pte_t __iomem *pd_addr; member
H A Dgen6_ppgtt.c27 ppgtt->pd_addr + pde); in gen6_write_pde()
165 ioread32(ppgtt->pd_addr + pde - 1); in gen6_flush_pd()
291 ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm + ggtt_offset; in pd_vma_bind()

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