Home
last modified time | relevance | path

Searched refs:power_domains (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_display_power.c264 mutex_lock(&power_domains->lock); in intel_display_power_is_enabled()
313 mutex_lock(&power_domains->lock); in intel_display_power_set_target_dc_state()
535 mutex_lock(&power_domains->lock); in intel_display_power_get()
566 mutex_lock(&power_domains->lock); in intel_display_power_get_if_enabled()
616 mutex_lock(&power_domains->lock); in __intel_display_power_put()
755 power_domains->async_put_next_delay = max(power_domains->async_put_next_delay, in __intel_display_power_put_async()
1026 power_domains->allowed_dc_mask = in intel_power_domains_init()
1029 power_domains->target_dc_state = in intel_power_domains_init()
1955 power_domains->init_wakeref = in intel_power_domains_init_hw()
2062 power_domains->init_wakeref = in intel_power_domains_disable()
[all …]
H A Dintel_display_power_map.c1597 power_domains->power_well_count = power_well_count; in __set_power_wells()
1598 power_domains->power_wells = in __set_power_wells()
1600 sizeof(*power_domains->power_wells), in __set_power_wells()
1602 if (!power_domains->power_wells) in __set_power_wells()
1630 __set_power_wells(power_domains, __power_well_descs, \
1651 power_domains->power_well_count = 0; in intel_display_power_map_init()
1662 return set_power_wells(power_domains, dg1_power_wells); in intel_display_power_map_init()
1666 return set_power_wells(power_domains, rkl_power_wells); in intel_display_power_map_init()
1668 return set_power_wells(power_domains, tgl_power_wells); in intel_display_power_map_init()
1670 return set_power_wells(power_domains, icl_power_wells); in intel_display_power_map_init()
[all …]
H A Dintel_display_power_map.h11 int intel_display_power_map_init(struct i915_power_domains *power_domains);
12 void intel_display_power_map_cleanup(struct i915_power_domains *power_domains);
H A Dintel_display_power_well.c721 power_domains->dc_state, val); in gen9_sanitize_dc_state()
722 power_domains->dc_state = val; in gen9_sanitize_dc_state()
759 state &= power_domains->allowed_dc_mask; in gen9_set_dc_state()
767 if ((val & mask) != power_domains->dc_state) in gen9_set_dc_state()
769 power_domains->dc_state, val & mask); in gen9_set_dc_state()
776 power_domains->dc_state = val & mask; in gen9_set_dc_state()
1013 switch (power_domains->target_dc_state) { in gen9_dc_off_power_well_disable()
1584 mutex_lock(&power_domains->lock); in chv_phy_powergate_ch()
1606 mutex_unlock(&power_domains->lock); in chv_phy_powergate_ch()
1619 mutex_lock(&power_domains->lock); in chv_phy_powergate_lanes()
[all …]
H A Dintel_dmc.c545 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_dmc_load_program() local
578 power_domains->dc_state = 0; in intel_dmc_load_program()
H A Dintel_psr.c899 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in tgl_dc3co_exitline_compute_config() local
916 if (!(power_domains->allowed_dc_mask & DC_STATE_EN_DC3CO)) in tgl_dc3co_exitline_compute_config()