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Searched refs:quad_part (Results 1 – 25 of 31) sorted by relevance

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/openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.c54 mc_vm_apt_low.quad_part = apt->sys_low.quad_part >> 18; in hubp3_set_vm_system_aperture_settings()
55 mc_vm_apt_high.quad_part = apt->sys_high.quad_part >> 18; in hubp3_set_vm_system_aperture_settings()
58 MC_VM_SYSTEM_APERTURE_LOW_ADDR, mc_vm_apt_low.quad_part); in hubp3_set_vm_system_aperture_settings()
108 if (address->grph.addr.quad_part == 0) in hubp3_program_surface_flip_and_addr()
115 if (address->grph.meta_addr.quad_part != 0) { in hubp3_program_surface_flip_and_addr()
134 if (address->video_progressive.luma_addr.quad_part == 0 in hubp3_program_surface_flip_and_addr()
179 if (address->grph_stereo.left_addr.quad_part == 0) in hubp3_program_surface_flip_and_addr()
181 if (address->grph_stereo.right_addr.quad_part == 0) in hubp3_program_surface_flip_and_addr()
264 if (address->rgbea.addr.quad_part == 0 in hubp3_program_surface_flip_and_addr()
265 || address->rgbea.alpha_addr.quad_part == 0) in hubp3_program_surface_flip_and_addr()
[all …]
H A Ddcn30_hwseq.c287 if (wb_info->mcif_warmup_params.start_address.quad_part != 0 && in dcn30_mmhubbub_warmup()
292 warmup_params.start_address.quad_part = wb_info->mcif_warmup_params.start_address.quad_part; in dcn30_mmhubbub_warmup()
313 warmup_params.start_address.quad_part = wb_info[i].mcif_buf_params.luma_address[i_buf]; in dcn30_mmhubbub_warmup()
685 if (pipe_ctx->stream->dmdata_address.quad_part != 0) { in dcn30_program_dmdata_engine()
743 plane->address.grph.cursor_cache_addr.quad_part; in dcn30_apply_idle_power_optimizations()
761 plane->address.page_table_base.quad_part == 0 && in dcn30_apply_idle_power_optimizations()
848 cmd.mall.cursor_copy_src.quad_part = cursor_attr.address.quad_part; in dcn30_apply_idle_power_optimizations()
849 cmd.mall.cursor_copy_dst.quad_part = in dcn30_apply_idle_power_optimizations()
850 (plane->address.grph.cursor_cache_addr.quad_part + 2047) & ~2047; in dcn30_apply_idle_power_optimizations()
858 cursor_attr.address.quad_part = cmd.mall.cursor_copy_dst.quad_part; in dcn30_apply_idle_power_optimizations()
H A Ddcn30_mmhubbub.c80 union large_integer start_address_shift = {.quad_part = params->start_address.quad_part >> 5}; in mmhubbub3_warmup_mcif()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn201/
H A Ddcn201_hwseq.c90 if (hwseq->fb_base.quad_part <= addr->quad_part && in gpu_addr_to_uma()
91 addr->quad_part < hwseq->fb_top.quad_part) { in gpu_addr_to_uma()
92 addr->quad_part -= hwseq->fb_base.quad_part; in gpu_addr_to_uma()
93 addr->quad_part += hwseq->fb_offset.quad_part; in gpu_addr_to_uma()
95 } else if (hwseq->fb_offset.quad_part <= addr->quad_part && in gpu_addr_to_uma()
96 addr->quad_part <= hwseq->uma_top.quad_part) { in gpu_addr_to_uma()
210 hws->fb_base.quad_part <<= 24; in read_mmhub_vm_setup()
213 hws->fb_top.quad_part <<= 24; in read_mmhub_vm_setup()
217 hws->uma_top.quad_part = hws->fb_top.quad_part in read_mmhub_vm_setup()
218 - hws->fb_base.quad_part + hws->fb_offset.quad_part; in read_mmhub_vm_setup()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_hubp.c388 if (address->grph.addr.quad_part == 0) in hubp1_program_surface_flip_and_addr()
395 if (address->grph.meta_addr.quad_part != 0) { in hubp1_program_surface_flip_and_addr()
414 if (address->video_progressive.luma_addr.quad_part == 0 in hubp1_program_surface_flip_and_addr()
459 if (address->grph_stereo.left_addr.quad_part == 0) in hubp1_program_surface_flip_and_addr()
461 if (address->grph_stereo.right_addr.quad_part == 0) in hubp1_program_surface_flip_and_addr()
484 if (address->grph_stereo.left_meta_addr.quad_part != 0) { in hubp1_program_surface_flip_and_addr()
752 if (earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) in hubp1_is_flip_pending()
769 mc_vm_apt_default.quad_part = apt->sys_default.quad_part >> 12; in hubp1_set_vm_system_aperture_settings()
770 mc_vm_apt_low.quad_part = apt->sys_low.quad_part >> 12; in hubp1_set_vm_system_aperture_settings()
771 mc_vm_apt_high.quad_part = apt->sys_high.quad_part >> 12; in hubp1_set_vm_system_aperture_settings()
[all …]
H A Ddcn10_hw_sequencer.c2382 apt->sys_default.quad_part = physical_page_number.quad_part << 12; in mmhub_read_vm_system_aperture_settings()
2383 apt->sys_low.quad_part = (int64_t)logical_addr_low << 18; in mmhub_read_vm_system_aperture_settings()
2384 apt->sys_high.quad_part = (int64_t)logical_addr_high << 18; in mmhub_read_vm_system_aperture_settings()
2426 fb_base.quad_part = (uint64_t)fb_base_value << 24; in mmhub_read_vm_context0_settings()
2427 fb_offset.quad_part = (uint64_t)fb_offset_value << 24; in mmhub_read_vm_context0_settings()
2428 vm0->pte_base.quad_part += fb_base.quad_part; in mmhub_read_vm_context0_settings()
2429 vm0->pte_base.quad_part -= fb_offset.quad_part; in mmhub_read_vm_context0_settings()
2806 if (pipe_ctx->stream->cursor_attributes.address.quad_part != 0) { in dcn10_update_dchubp_dpp()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn21/
H A Ddcn21_hubp.c237 mc_vm_apt_low.quad_part = apt->sys_low.quad_part >> 18; in hubp21_set_vm_system_aperture_settings()
238 mc_vm_apt_high.quad_part = apt->sys_high.quad_part >> 18; in hubp21_set_vm_system_aperture_settings()
241 MC_VM_SYSTEM_APERTURE_LOW_ADDR, mc_vm_apt_low.quad_part); in hubp21_set_vm_system_aperture_settings()
244 MC_VM_SYSTEM_APERTURE_HIGH_ADDR, mc_vm_apt_high.quad_part); in hubp21_set_vm_system_aperture_settings()
707 if (address->grph.addr.quad_part == 0) { in hubp21_program_surface_flip_and_addr()
712 if (address->grph.meta_addr.quad_part != 0) { in hubp21_program_surface_flip_and_addr()
725 if (address->video_progressive.luma_addr.quad_part == 0 in hubp21_program_surface_flip_and_addr()
754 if (address->grph_stereo.left_addr.quad_part == 0) in hubp21_program_surface_flip_and_addr()
756 if (address->grph_stereo.right_addr.quad_part == 0) in hubp21_program_surface_flip_and_addr()
761 if (address->grph_stereo.right_meta_addr.quad_part != 0) { in hubp21_program_surface_flip_and_addr()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_hubp.c55 mc_vm_apt_default.quad_part = apt->sys_default.quad_part >> 12; in hubp2_set_vm_system_aperture_settings()
58 mc_vm_apt_low.quad_part = apt->sys_low.quad_part >> 18; in hubp2_set_vm_system_aperture_settings()
59 mc_vm_apt_high.quad_part = apt->sys_high.quad_part >> 18; in hubp2_set_vm_system_aperture_settings()
69 MC_VM_SYSTEM_APERTURE_LOW_ADDR, mc_vm_apt_low.quad_part); in hubp2_set_vm_system_aperture_settings()
740 if (address->grph.addr.quad_part == 0) in hubp2_program_surface_flip_and_addr()
747 if (address->grph.meta_addr.quad_part != 0) { in hubp2_program_surface_flip_and_addr()
766 if (address->video_progressive.luma_addr.quad_part == 0 in hubp2_program_surface_flip_and_addr()
811 if (address->grph_stereo.left_addr.quad_part == 0) in hubp2_program_surface_flip_and_addr()
813 if (address->grph_stereo.right_addr.quad_part == 0) in hubp2_program_surface_flip_and_addr()
928 if (earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) in hubp2_is_flip_pending()
[all …]
H A Ddcn20_hwseq.c1202 apt.sys_default.quad_part = 0; in dcn20_enable_plane()
1204 apt.sys_low.quad_part = dc->vm_pa_config.system_aperture.start_addr; in dcn20_enable_plane()
1205 apt.sys_high.quad_part = dc->vm_pa_config.system_aperture.end_addr; in dcn20_enable_plane()
1594 pipe_ctx->stream->cursor_attributes.address.quad_part != 0) { in dcn20_update_dchubp_dpp()
2317 attr.address.quad_part = in dcn20_set_dmdata_attributes()
2318 pipe_ctx->stream->dmdata_address.quad_part; in dcn20_set_dmdata_attributes()
2794 if (pipe_ctx->stream->dmdata_address.quad_part != 0) { in dcn20_program_dmdata_engine()
/openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c407 if (!table || clk_mgr_dcn316->smu_wm_set.mc_address.quad_part == 0) in dcn316_notify_wm_ranges()
429 if (!table || smu_dpm_clks->mc_address.quad_part == 0) in dcn316_get_dpm_table_from_smu()
598 &clk_mgr->smu_wm_set.mc_address.quad_part); in dcn316_clk_mgr_construct()
602 clk_mgr->smu_wm_set.mc_address.quad_part = 0; in dcn316_clk_mgr_construct()
610 &smu_dpm_clks.mc_address.quad_part); in dcn316_clk_mgr_construct()
614 smu_dpm_clks.mc_address.quad_part = 0; in dcn316_clk_mgr_construct()
662 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn316_clk_mgr_construct()
671 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn316_clk_mgr_destroy()
/openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c451 if (!table || clk_mgr_vgh->smu_wm_set.mc_address.quad_part == 0) in vg_notify_wm_ranges()
646 if (!table || smu_dpm_clks->mc_address.quad_part == 0) in vg_get_dpm_table_from_smu()
684 &clk_mgr->smu_wm_set.mc_address.quad_part); in vg_clk_mgr_construct()
688 clk_mgr->smu_wm_set.mc_address.quad_part = 0; in vg_clk_mgr_construct()
696 &smu_dpm_clks.mc_address.quad_part); in vg_clk_mgr_construct()
700 smu_dpm_clks.mc_address.quad_part = 0; in vg_clk_mgr_construct()
738 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in vg_clk_mgr_construct()
747 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in vg_clk_mgr_destroy()
/openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c485 if (!table || clk_mgr_dcn31->smu_wm_set.mc_address.quad_part == 0) in dcn31_notify_wm_ranges()
507 if (!table || smu_dpm_clks->mc_address.quad_part == 0) in dcn31_get_dpm_table_from_smu()
697 &clk_mgr->smu_wm_set.mc_address.quad_part); in dcn31_clk_mgr_construct()
701 clk_mgr->smu_wm_set.mc_address.quad_part = 0; in dcn31_clk_mgr_construct()
709 &smu_dpm_clks.mc_address.quad_part); in dcn31_clk_mgr_construct()
713 smu_dpm_clks.mc_address.quad_part = 0; in dcn31_clk_mgr_construct()
795 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn31_clk_mgr_construct()
804 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn31_clk_mgr_destroy()
/openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c445 if (!table || clk_mgr_dcn315->smu_wm_set.mc_address.quad_part == 0) in dcn315_notify_wm_ranges()
467 if (!table || smu_dpm_clks->mc_address.quad_part == 0) in dcn315_get_dpm_table_from_smu()
628 &clk_mgr->smu_wm_set.mc_address.quad_part); in dcn315_clk_mgr_construct()
632 clk_mgr->smu_wm_set.mc_address.quad_part = 0; in dcn315_clk_mgr_construct()
640 &smu_dpm_clks.mc_address.quad_part); in dcn315_clk_mgr_construct()
644 smu_dpm_clks.mc_address.quad_part = 0; in dcn315_clk_mgr_construct()
723 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn315_clk_mgr_construct()
732 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn315_clk_mgr_destroy()
/openbsd/sys/dev/pci/drm/amd/display/dc/core/
H A Ddc_debug.c83 plane_state->address.grph.addr.quad_part, in pre_surface_trace()
84 plane_state->address.grph.meta_addr.quad_part, in pre_surface_trace()
195 update->flip_addr->address.grph.addr.quad_part, in update_surface_trace()
196 update->flip_addr->address.grph.meta_addr.quad_part, in update_surface_trace()
H A Ddc_stream.c353 if (attributes->address.quad_part == 0) { in dc_stream_set_cursor_attributes()
714 pipe_ctx->stream->dmdata_address.quad_part != 0) { in dc_stream_set_dynamic_metadata()
/openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c500 if (!table || clk_mgr_dcn314->smu_wm_set.mc_address.quad_part == 0) in dcn314_notify_wm_ranges()
522 if (!table || smu_dpm_clks->mc_address.quad_part == 0) in dcn314_get_dpm_table_from_smu()
741 &clk_mgr->smu_wm_set.mc_address.quad_part); in dcn314_clk_mgr_construct()
745 clk_mgr->smu_wm_set.mc_address.quad_part = 0; in dcn314_clk_mgr_construct()
753 &smu_dpm_clks.mc_address.quad_part); in dcn314_clk_mgr_construct()
757 smu_dpm_clks.mc_address.quad_part = 0; in dcn314_clk_mgr_construct()
838 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn314_clk_mgr_construct()
847 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn314_clk_mgr_destroy()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_mmhubbub.c80 union large_integer start_address_shift = {.quad_part = params->start_address.quad_part >> 5}; in mmhubbub32_warmup_mcif()
/openbsd/sys/dev/pci/drm/amd/display/dmub/src/
H A Ddmub_dcn30.c84 addr_out->quad_part = addr_in->quad_part - fb_base + fb_offset; in dmub_dcn30_translate_addr()
H A Ddmub_srv.c562 cw0.offset.quad_part = inst_fb->gpu_addr; in dmub_srv_hw_init()
566 cw1.offset.quad_part = stack_fb->gpu_addr; in dmub_srv_hw_init()
587 cw2.offset.quad_part = data_fb->gpu_addr; in dmub_srv_hw_init()
591 cw3.offset.quad_part = bios_fb->gpu_addr; in dmub_srv_hw_init()
595 cw4.offset.quad_part = mail_fb->gpu_addr; in dmub_srv_hw_init()
611 cw5.offset.quad_part = tracebuff_fb->gpu_addr; in dmub_srv_hw_init()
618 cw6.offset.quad_part = fw_state_fb->gpu_addr; in dmub_srv_hw_init()
H A Ddmub_dcn20.c84 addr_out->quad_part = addr_in->quad_part - fb_base + fb_offset; in dmub_dcn20_translate_addr()
H A Ddmub_dcn31.c80 addr_out->quad_part = addr_in->quad_part - fb_base + fb_offset; in dmub_dcn31_translate_addr()
H A Ddmub_dcn32.c81 addr_out->quad_part = addr_in->quad_part - fb_base + fb_offset; in dmub_dcn32_translate_addr()
/openbsd/sys/dev/pci/drm/amd/display/dc/inc/
H A Dcompressor.h45 uint64_t quad_part; member
/openbsd/sys/dev/pci/drm/amd/display/dc/dce/
H A Ddmub_abm_lcd.c182 …cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_ad… in dmub_abm_init_config()
242 …cmd.abm_save_restore.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_a… in dmub_abm_save_restore()
H A Ddce_mem_input.c853 if (address->grph.addr.quad_part == 0) in dce_mi_program_surface_flip_and_addr()
858 if (address->grph_stereo.left_addr.quad_part == 0 || in dce_mi_program_surface_flip_and_addr()
859 address->grph_stereo.right_addr.quad_part == 0) in dce_mi_program_surface_flip_and_addr()

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