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Searched refs:ras_block (Results 1 – 25 of 51) sorted by relevance

123

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_mca.c90 strlcpy(ras->ras_block.ras_comm.name, "mca.mp0", in amdgpu_mca_mp0_ras_sw_init()
91 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_mca_mp0_ras_sw_init()
92 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp0_ras_sw_init()
94 adev->mca.mp0.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp0_ras_sw_init()
115 strlcpy(ras->ras_block.ras_comm.name, "mca.mp1", in amdgpu_mca_mp1_ras_sw_init()
116 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_mca_mp1_ras_sw_init()
117 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp1_ras_sw_init()
119 adev->mca.mp1.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp1_ras_sw_init()
140 strlcpy(ras->ras_block.ras_comm.name, "mca.mpio", in amdgpu_mca_mpio_ras_sw_init()
141 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_mca_mpio_ras_sw_init()
[all …]
H A Damdgpu_nbio.c34 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_nbio_ras_sw_init()
40 strlcpy(ras->ras_block.ras_comm.name, "pcie_bif", in amdgpu_nbio_ras_sw_init()
41 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_nbio_ras_sw_init()
42 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__PCIE_BIF; in amdgpu_nbio_ras_sw_init()
43 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_nbio_ras_sw_init()
44 adev->nbio.ras_if = &ras->ras_block.ras_comm; in amdgpu_nbio_ras_sw_init()
65 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_nbio_ras_late_init() argument
68 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_nbio_ras_late_init()
72 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_nbio_ras_late_init()
83 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_nbio_ras_late_init()
H A Damdgpu_umc.c91 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
95 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
231 strlcpy(adev->umc.ras->ras_block.ras_comm.name, "umc", in amdgpu_umc_ras_sw_init()
232 sizeof(adev->umc.ras->ras_block.ras_comm.name)); in amdgpu_umc_ras_sw_init()
233 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in amdgpu_umc_ras_sw_init()
235 adev->umc.ras_if = &ras->ras_block.ras_comm; in amdgpu_umc_ras_sw_init()
237 if (!ras->ras_block.ras_late_init) in amdgpu_umc_ras_sw_init()
240 if (!ras->ras_block.ras_cb) in amdgpu_umc_ras_sw_init()
250 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_umc_ras_late_init()
254 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_umc_ras_late_init()
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H A Damdgpu_hdp.c35 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_hdp_ras_sw_init()
41 strlcpy(ras->ras_block.ras_comm.name, "hdp", in amdgpu_hdp_ras_sw_init()
42 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_hdp_ras_sw_init()
43 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP; in amdgpu_hdp_ras_sw_init()
44 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_hdp_ras_sw_init()
45 adev->hdp.ras_if = &ras->ras_block.ras_comm; in amdgpu_hdp_ras_sw_init()
H A Damdgpu_mmhub.c33 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mmhub_ras_sw_init()
39 strlcpy(ras->ras_block.ras_comm.name, "mmhub", in amdgpu_mmhub_ras_sw_init()
40 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_mmhub_ras_sw_init()
41 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB; in amdgpu_mmhub_ras_sw_init()
42 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_mmhub_ras_sw_init()
43 adev->mmhub.ras_if = &ras->ras_block.ras_comm; in amdgpu_mmhub_ras_sw_init()
H A Damdgpu_sdma.c99 struct ras_common_if *ras_block) in amdgpu_sdma_ras_late_init() argument
103 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_sdma_ras_late_init()
107 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_sdma_ras_late_init()
119 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_sdma_ras_late_init()
332 strlcpy(ras->ras_block.ras_comm.name, "sdma", in amdgpu_sdma_ras_sw_init()
333 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_sdma_ras_sw_init()
334 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA; in amdgpu_sdma_ras_sw_init()
336 adev->sdma.ras_if = &ras->ras_block.ras_comm; in amdgpu_sdma_ras_sw_init()
339 if (!ras->ras_block.ras_late_init) in amdgpu_sdma_ras_sw_init()
343 if (!ras->ras_block.ras_cb) in amdgpu_sdma_ras_sw_init()
[all …]
H A Damdgpu_jpeg.c252 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_jpeg_ras_late_init()
256 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_jpeg_ras_late_init()
270 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_jpeg_ras_late_init()
283 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_jpeg_ras_sw_init()
289 strlcpy(ras->ras_block.ras_comm.name, "jpeg", in amdgpu_jpeg_ras_sw_init()
290 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_jpeg_ras_sw_init()
291 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG; in amdgpu_jpeg_ras_sw_init()
292 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_jpeg_ras_sw_init()
293 adev->jpeg.ras_if = &ras->ras_block.ras_comm; in amdgpu_jpeg_ras_sw_init()
295 if (!ras->ras_block.ras_late_init) in amdgpu_jpeg_ras_sw_init()
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H A Dmca_v3_0.c60 .ras_block = {
80 .ras_block = {
100 .ras_block = {
H A Damdgpu_ras.c93 if (!ras_block) in get_ras_block_str()
96 if (ras_block->block >= AMDGPU_RAS_BLOCK_COUNT) in get_ras_block_str()
99 if (ras_block->block == AMDGPU_RAS_BLOCK__MCA) in get_ras_block_str()
102 return ras_block_string[ras_block->block]; in get_ras_block_str()
2740 struct ras_common_if *ras_block) in amdgpu_persistent_edc_harvesting() argument
2743 .head = *ras_block, in amdgpu_persistent_edc_harvesting()
2770 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init() argument
2843 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init_default() argument
2850 struct ras_common_if *ras_block) in amdgpu_ras_block_late_fini() argument
2853 if (!ras_block) in amdgpu_ras_block_late_fini()
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H A Damdgpu_gfx.c797 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_gfx_ras_late_init()
804 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_gfx_ras_late_init()
814 amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0); in amdgpu_gfx_ras_late_init()
819 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_gfx_ras_late_init()
842 strlcpy(ras->ras_block.ras_comm.name, "gfx", in amdgpu_gfx_ras_sw_init()
843 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_gfx_ras_sw_init()
844 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX; in amdgpu_gfx_ras_sw_init()
846 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
849 if (!ras->ras_block.ras_late_init) in amdgpu_gfx_ras_sw_init()
853 if (!ras->ras_block.ras_cb) in amdgpu_gfx_ras_sw_init()
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H A Daldebaran.c366 tmp_adev->sdma.ras->ras_block.ras_late_init) { in aldebaran_mode2_restore_hwcontext()
367 r = tmp_adev->sdma.ras->ras_block.ras_late_init(tmp_adev, in aldebaran_mode2_restore_hwcontext()
368 &tmp_adev->sdma.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
376 tmp_adev->gfx.ras->ras_block.ras_late_init) { in aldebaran_mode2_restore_hwcontext()
377 r = tmp_adev->gfx.ras->ras_block.ras_late_init(tmp_adev, in aldebaran_mode2_restore_hwcontext()
378 &tmp_adev->gfx.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
H A Damdgpu_jpeg.h48 struct amdgpu_ras_block_object ras_block; member
83 struct ras_common_if *ras_block);
H A Damdgpu_xgmi.c909 static int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_xgmi_ras_late_init() argument
915 adev->gmc.xgmi.ras->ras_block.hw_ops->reset_ras_error_count(adev); in amdgpu_xgmi_ras_late_init()
917 return amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_xgmi_ras_late_init()
1081 adev->gmc.xgmi.ras->ras_block.hw_ops->reset_ras_error_count(adev); in amdgpu_xgmi_query_ras_error_count()
1122 .ras_block = {
1137 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_xgmi_ras_sw_init()
1143 strlcpy(ras->ras_block.ras_comm.name, "xgmi_wafl", in amdgpu_xgmi_ras_sw_init()
1144 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_xgmi_ras_sw_init()
1145 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL; in amdgpu_xgmi_ras_sw_init()
1146 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_xgmi_ras_sw_init()
[all …]
H A Damdgpu_umc.h55 struct amdgpu_ras_block_object ras_block; member
97 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
H A Damdgpu_ras.h553 int (*ras_late_init)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
554 void (*ras_fini)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
672 struct ras_common_if *ras_block);
675 struct ras_common_if *ras_block);
734 const char *get_ras_block_str(struct ras_common_if *ras_block);
H A Damdgpu_vcn.c1201 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_vcn_ras_late_init()
1205 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_vcn_ras_late_init()
1219 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_vcn_ras_late_init()
1232 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_vcn_ras_sw_init()
1238 strlcpy(ras->ras_block.ras_comm.name, "vcn", in amdgpu_vcn_ras_sw_init()
1239 sizeof(ras->ras_block.ras_comm.name)); in amdgpu_vcn_ras_sw_init()
1240 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN; in amdgpu_vcn_ras_sw_init()
1241 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_vcn_ras_sw_init()
1242 adev->vcn.ras_if = &ras->ras_block.ras_comm; in amdgpu_vcn_ras_sw_init()
1244 if (!ras->ras_block.ras_late_init) in amdgpu_vcn_ras_sw_init()
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H A Damdgpu_sdma.h94 struct amdgpu_ras_block_object ras_block; member
161 struct ras_common_if *ras_block);
H A Damdgpu_nbio.h51 struct amdgpu_ras_block_object ras_block; member
118 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
H A Damdgpu_hdp.h28 struct amdgpu_ras_block_object ras_block; member
H A Damdgpu_mca.h25 struct amdgpu_ras_block_object ras_block; member
H A Damdgpu_mmhub.h48 struct amdgpu_ras_block_object ras_block; member
H A Damdgpu_vcn.h258 struct amdgpu_ras_block_object ras_block; member
424 struct ras_common_if *ras_block);
H A Dhdp_v4_0.c163 .ras_block = {
H A Damdgpu_gfx.h265 struct amdgpu_ras_block_object ras_block; member
518 int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
H A Dsdma_v4_4.c271 .ras_block = {

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