| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 88 bool safe_to_lower) in dcn201_update_clocks() argument
112 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks()
119 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
122 if (should_set_clock(safe_to_lower, in dcn201_update_clocks()
126 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks()
136 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) in dcn201_update_clocks()
139 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn201_update_clocks()
147 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn201_update_clocks()
153 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn201_update_clocks()
155 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn201_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_hubbub.c | 172 bool safe_to_lower) in hubbub32_program_urgent_watermarks() argument
194 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub32_program_urgent_watermarks()
204 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub32_program_urgent_watermarks()
238 if (safe_to_lower || watermarks->b.frac_urg_bw_flip in hubbub32_program_urgent_watermarks()
248 if (safe_to_lower || watermarks->b.frac_urg_bw_nom in hubbub32_program_urgent_watermarks()
292 if (safe_to_lower || watermarks->c.frac_urg_bw_nom in hubbub32_program_urgent_watermarks()
336 if (safe_to_lower || watermarks->d.frac_urg_bw_nom in hubbub32_program_urgent_watermarks()
362 bool safe_to_lower) in hubbub32_program_stutter_watermarks() argument
508 bool safe_to_lower) in hubbub32_program_pstate_watermarks() argument
661 bool safe_to_lower) in hubbub32_program_usr_watermarks() argument
[all …]
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| H A D | dcn32_hubbub.h | 121 bool safe_to_lower);
127 bool safe_to_lower);
133 bool safe_to_lower);
139 bool safe_to_lower);
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_hubbub.c | 145 bool safe_to_lower) in hubbub21_program_urgent_watermarks() argument
168 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
178 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
213 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
223 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
258 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
268 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
313 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
339 bool safe_to_lower) in hubbub21_program_stutter_watermarks() argument
492 bool safe_to_lower) in hubbub21_program_pstate_watermarks() argument
[all …]
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| H A D | dcn21_hubbub.h | 132 bool safe_to_lower);
137 bool safe_to_lower);
142 bool safe_to_lower);
147 bool safe_to_lower);
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hubbub.c | 155 bool safe_to_lower) in hubbub31_program_urgent_watermarks() argument
177 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub31_program_urgent_watermarks()
187 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
221 if (safe_to_lower || watermarks->b.frac_urg_bw_flip in hubbub31_program_urgent_watermarks()
231 if (safe_to_lower || watermarks->b.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
265 if (safe_to_lower || watermarks->c.frac_urg_bw_flip in hubbub31_program_urgent_watermarks()
275 if (safe_to_lower || watermarks->c.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
319 if (safe_to_lower || watermarks->d.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
345 bool safe_to_lower) in hubbub31_program_stutter_watermarks() argument
618 bool safe_to_lower) in hubbub31_program_pstate_watermarks() argument
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 105 struct dc_state *context, bool safe_to_lower) in dcn20_update_clocks_update_dpp_dto() argument
121 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn20_update_clocks_update_dpp_dto()
218 bool safe_to_lower) in dcn2_update_clocks() argument
253 if (enter_display_off == safe_to_lower) { in dcn2_update_clocks()
268 if (should_set_clock(safe_to_lower, in dcn2_update_clocks()
321 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn2_update_clocks()
324 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn2_update_clocks()
331 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn2_update_clocks()
345 bool safe_to_lower) in dcn2_update_clocks_fpga() argument
361 if (should_set_clock(safe_to_lower, in dcn2_update_clocks_fpga()
[all …]
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| H A D | dcn20_clk_mgr.h | 31 bool safe_to_lower);
35 bool safe_to_lower);
37 struct dc_state *context, bool safe_to_lower);
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hubbub.c | 247 bool safe_to_lower) in hubbub1_program_urgent_watermarks() argument
361 bool safe_to_lower) in hubbub1_program_stutter_watermarks() argument
384 if (safe_to_lower || watermarks->a.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
417 if (safe_to_lower || watermarks->b.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
450 if (safe_to_lower || watermarks->c.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
483 if (safe_to_lower || watermarks->d.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
506 bool safe_to_lower) in hubbub1_program_pstate_watermarks() argument
513 if (safe_to_lower || watermarks->a.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks()
530 if (safe_to_lower || watermarks->b.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks()
547 if (safe_to_lower || watermarks->c.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr.c | 92 bool safe_to_lower) in ramp_up_dispclk_with_dpp() argument
156 if (!safe_to_lower) in ramp_up_dispclk_with_dpp()
192 bool safe_to_lower) in rv1_update_clocks() argument
217 if (enter_display_off == safe_to_lower) { in rv1_update_clocks()
233 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rv1_update_clocks()
242 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in rv1_update_clocks()
248 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
253 if (should_set_clock(safe_to_lower, in rv1_update_clocks()
275 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz) in rv1_update_clocks()
277 ramp_up_dispclk_with_dpp(clk_mgr, dc, new_clocks, safe_to_lower); in rv1_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 194 bool safe_to_lower) in dcn3_update_clocks() argument
227 if (enter_display_off == safe_to_lower) in dcn3_update_clocks()
234 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks()
244 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn3_update_clocks()
252 if (dc->clk_mgr->dc_mode_softmax_enabled && safe_to_lower && !p_state_change_support) { in dcn3_update_clocks()
275 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn3_update_clocks()
285 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn3_update_clocks()
294 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn3_update_clocks()
300 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn3_update_clocks()
303 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn3_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 103 bool safe_to_lower, bool disable) in dcn316_disable_otg_wa() argument
109 struct pipe_ctx *pipe = safe_to_lower in dcn316_disable_otg_wa()
137 bool safe_to_lower) in dcn316_update_clocks() argument
156 if (safe_to_lower) { in dcn316_update_clocks()
190 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks()
195 if (should_set_clock(safe_to_lower, in dcn316_update_clocks()
207 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn316_update_clocks()
215 dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); in dcn316_update_clocks()
219 dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false); in dcn316_update_clocks()
226 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn316_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_hubbub.c | 57 bool safe_to_lower) in hubbub201_program_watermarks() argument
62 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
65 if (hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 294 struct dc_state *context, bool safe_to_lower) in dcn32_update_clocks_update_dpp_dto() argument
321 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn32_update_clocks_update_dpp_dto()
456 bool safe_to_lower) in dcn32_update_clocks() argument
491 if (enter_display_off == safe_to_lower) in dcn32_update_clocks()
513 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && in dcn32_update_clocks()
525 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn32_update_clocks()
604 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn32_update_clocks()
616 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn32_update_clocks()
635 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn32_update_clocks()
638 dcn32_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn32_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr_internal.h | 360 static inline bool should_set_clock(bool safe_to_lower, int calc_clk, int cur_clk) in should_set_clock() argument
362 return ((safe_to_lower && calc_clk < cur_clk) || calc_clk > cur_clk); in should_set_clock()
365 static inline bool should_update_pstate_support(bool safe_to_lower, bool calc_support, bool cur_sup… in should_update_pstate_support() argument
368 if (calc_support && safe_to_lower) in should_update_pstate_support()
370 else if (!calc_support && !safe_to_lower) in should_update_pstate_support()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dce120/ |
| H A D | dce120_clk_mgr.c | 86 bool safe_to_lower) in dce12_update_clocks() argument
97 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce12_update_clocks()
112 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { in dce12_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce/ |
| H A D | dce_clk_mgr.c | 674 bool safe_to_lower) in dce_update_clocks() argument
686 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()
692 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce_update_clocks()
701 bool safe_to_lower) in dce11_update_clocks() argument
713 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()
719 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce11_update_clocks()
728 bool safe_to_lower) in dce112_update_clocks() argument
746 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce112_update_clocks()
755 bool safe_to_lower) in dce12_update_clocks() argument
766 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce12_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 107 struct dc_state *context, int ref_dpp_clk, bool safe_to_lower) in rn_update_clocks_update_dpp_dto() argument
124 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in rn_update_clocks_update_dpp_dto()
133 bool safe_to_lower) in rn_update_clocks() argument
152 if (safe_to_lower && !dc->debug.disable_48mhz_pwrdwn) { in rn_update_clocks()
174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
179 if (should_set_clock(safe_to_lower, in rn_update_clocks()
199 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in rn_update_clocks()
206 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in rn_update_clocks()
219 safe_to_lower); in rn_update_clocks()
229 safe_to_lower); in rn_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dce60/ |
| H A D | dce60_clk_mgr.c | 122 bool safe_to_lower) in dce60_update_clocks() argument
134 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce60_update_clocks()
140 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce60_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 135 bool safe_to_lower, bool disable) in dcn314_disable_otg_wa() argument
141 struct pipe_ctx *pipe = safe_to_lower in dcn314_disable_otg_wa()
162 bool safe_to_lower) in dcn314_update_clocks() argument
180 if (safe_to_lower) { in dcn314_update_clocks()
229 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn314_update_clocks()
234 if (should_set_clock(safe_to_lower, in dcn314_update_clocks()
244 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn314_update_clocks()
252 dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); in dcn314_update_clocks()
256 dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false); in dcn314_update_clocks()
263 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn314_update_clocks()
[all …]
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 97 bool safe_to_lower) in vg_update_clocks() argument
114 if (safe_to_lower) { in vg_update_clocks()
142 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks()
147 if (should_set_clock(safe_to_lower, in vg_update_clocks()
157 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in vg_update_clocks()
164 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in vg_update_clocks()
173 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in vg_update_clocks()
180 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in vg_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | dce112_clk_mgr.c | 193 bool safe_to_lower) in dce112_update_clocks() argument
205 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce112_update_clocks()
211 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce112_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 135 bool safe_to_lower) in dcn31_update_clocks() argument
153 if (safe_to_lower) { in dcn31_update_clocks()
201 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn31_update_clocks()
206 if (should_set_clock(safe_to_lower, in dcn31_update_clocks()
216 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn31_update_clocks()
223 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn31_update_clocks()
235 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn31_update_clocks()
243 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn31_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 127 bool safe_to_lower) in dcn315_update_clocks() argument
147 if (safe_to_lower) { in dcn315_update_clocks()
183 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn315_update_clocks()
188 if (should_set_clock(safe_to_lower, in dcn315_update_clocks()
200 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn315_update_clocks()
207 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn315_update_clocks()
222 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn315_update_clocks()
230 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn315_update_clocks()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hubbub.c | 575 bool safe_to_lower) in hubbub2_program_watermarks() argument
583 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub2_program_watermarks()
586 if (hubbub1_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub2_program_watermarks()
596 safe_to_lower = true; in hubbub2_program_watermarks()
598 hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); in hubbub2_program_watermarks()
|