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/openbsd/usr.bin/sort/
H A Dradixsort.c206 struct sort_level *slc; in run_sort_level_next() local
315 if (slc) { in run_sort_level_next()
322 push_ls(slc); in run_sort_level_next()
336 if (slc) { in run_sort_level_next()
343 push_ls(slc); in run_sort_level_next()
365 slc = pop_ls_st(); in run_sort_cycle_st()
366 if (slc == NULL) { in run_sort_cycle_st()
414 if (slc) { in run_top_sort_level()
418 push_ls(slc); in run_top_sort_level()
431 if (slc) { in run_top_sort_level()
[all …]
/openbsd/sys/dev/pci/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx10.asm379 global_store_dword_addtid v0, [s_save_ttmps_lo, s_save_ttmps_hi] slc:1 glc:1
458 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
471 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
522 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
565 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
586 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
649 buffer_store_dword v1, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
667 buffer_store_dword v1, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
715 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
741 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
[all …]
H A Dcwsr_trap_handler_gfx8.asm352 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
353 buffer_store_dword v1, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256
354 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*2
355 buffer_store_dword v3, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*3
407 buffer_store_dwordx2 v[0:1], v2, s_save_buf_rsrc0, s_save_mem_offset offen:1 glc:1 slc:1
450 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
451 buffer_store_dword v1, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256
452 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*2
453 buffer_store_dword v3, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*3
547 buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset slc:1 glc:1
[all …]
H A Dcwsr_trap_handler_gfx9.asm584 buffer_store_dwordx2 v[0:1], v2, s_save_buf_rsrc0, s_save_mem_offset offen:1 glc:1 slc:1
982 buffer_store_dword v0, v0, s_rsrc, s_mem_offset slc:1 glc:1
983 buffer_store_dword v1, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256
984 buffer_store_dword v2, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*2
985 buffer_store_dword v3, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*3
989 buffer_load_dword v0, v0, s_rsrc, s_mem_offset slc:1 glc:1
990 buffer_load_dword v1, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256
991 buffer_load_dword v2, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*2
992 buffer_load_dword v3, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*3
/openbsd/gnu/llvm/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX7.rst227 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
228 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
229 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
230 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
231 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
232 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
233 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
234 …_gfx7_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
235 …dgpu_synid_gfx7_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
236 …dgpu_synid_gfx7_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
[all …]
H A DAMDGPUAsmGFX1030.rst431 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
432 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
433 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
434 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
435 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
436 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
437 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
438 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
439 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
440 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
[all …]
H A DAMDGPUAsmGFX10.rst458 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
459 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
460 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
461 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
462 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
463 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
464 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
465 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
466 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
467 …:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
[all …]
H A DAMDGPUAsmGFX9.rst238 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
239 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
240 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
241 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
242 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
243 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
244 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
245 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
246 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
247 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
[all …]
H A DAMDGPUAsmGFX11.rst280 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
281 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
282 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
283 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
284 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
285 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
286 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
287 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
288 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
289 …:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
[all …]
H A DAMDGPUAsmGFX90a.rst202 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
203 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
204 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
205 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
206 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
207 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
208 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
209 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
210 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
211 …ef:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
[all …]
H A DAMDGPUAsmGFX8.rst228 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
229 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
230 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
231 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
232 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
233 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
234 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
235 …_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
236 …dgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
237 …dgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
[all …]
H A DAMDGPUAsmGFX1013.rst45 …_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` …
H A DAMDGPUAsmGFX908.rst43 …_gfx908_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
44 …_gfx908_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
53 …`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
54 …`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
/openbsd/gnu/llvm/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td1001 llvm_i1_ty], // slc(imm)
1024 llvm_i1_ty], // slc(imm)
1103 llvm_i32_ty], // cachepolicy(imm; bit 1 = slc)
1127 llvm_i32_ty], // cachepolicy(imm; bit 1 = slc)
1141 llvm_i32_ty], // cachepolicy(imm; bit 1 = slc)
1164 llvm_i32_ty], // cachepolicy(imm; bit 1 = slc)
1187 llvm_i1_ty], // slc(imm)
1204 llvm_i1_ty], // slc(imm)
1280 llvm_i1_ty], // slc(imm)
1300 llvm_i1_ty], // slc(imm)
[all …]
/openbsd/gnu/llvm/llvm/docs/
H A DAMDGPUModifierSyntax.rst354 slc subsection
448 slc subsection
604 before the operation. For other opcodes, it is used together with :ref:`slc<amdgpu_synid_slc>`
645 slc subsection
653 slc Set slc bit to 1.
791 slc subsection
H A DAMDGPUUsage.rst5267 glc=1 slc=1
5295 glc=1 slc=1
6573 glc=1 slc=1
6601 glc=1 slc=1
11379 slc=1 dlc=1
11410 glc=1 slc=1 dlc=1
14431 flat_atomic_cmpswap v1, v[3:4], v[5:6] glc slc
14446 buffer_atomic_inc v1, v2, s[8:11], s4 idxen offset:4 slc
/openbsd/usr.bin/telnet/
H A Dtelnet.c69 static void slc(unsigned char *, int);
738 slc(subpointer, SB_LEN()); in suboption()
1045 slc(unsigned char *cp, int len) in slc() function
/openbsd/gnu/usr.bin/perl/lib/unicore/
H A DPropertyAliases.txt74 slc ; Simple_Lowercase_Mapping
H A DPropValueAliases.txt1456 # Simple_Lowercase_Mapping (slc)
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td255 def : PRFM<"pld", 0b00, "slc", 0b11, "keep", 0b0>;
256 def : PRFM<"pld", 0b00, "slc", 0b11, "strm", 0b1>;
265 def : PRFM<"pli", 0b01, "slc", 0b11, "keep", 0b0>;
266 def : PRFM<"pli", 0b01, "slc", 0b11, "strm", 0b1>;
275 def : PRFM<"pst", 0b10, "slc", 0b11, "keep", 0b0>;
276 def : PRFM<"pst", 0b10, "slc", 0b11, "strm", 0b1>;
H A DAArch64.td524 def FeaturePRFM_SLC : SubtargetFeature<"prfm-slc-target", "HasPRFM_SLC",
/openbsd/gnu/usr.bin/perl/
H A DAUTHORS790 Ken MacLeod <ken@bitsko.slc.ut.us>
/openbsd/gnu/usr.bin/perl/pod/
H A Dperluniprops.pod7552 Simple_Lowercase_Mapping (Short: slc)