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Searched refs:uimm3 (Results 1 – 16 of 16) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsMTInstrInfo.td54 dag InOperandList = (ins GPR32Opnd:$rt, uimm1:$u, uimm3:$sel, uimm1:$h);
62 dag InOperandList = (ins GPR32Opnd:$rt, uimm1:$u, uimm3:$sel, uimm1:$h);
118 uimm3:$sel),
122 uimm3:$sel),
148 uimm3:$sel),
H A DMicroMipsDSPInstrInfo.td232 "shll.qb", null_frag, immZExt3, NoItinerary, DSPROpnd, uimm3>,
238 "shra.qb", null_frag, immZExt3, NoItinerary, DSPROpnd, uimm3>;
240 "shra_r.qb", int_mips_shra_r_qb, immZExt3, NoItinerary, DSPROpnd, uimm3>;
248 "shrl.qb", null_frag, immZExt3, NoItinerary, DSPROpnd, uimm3>;
H A DMipsDSPInstrInfo.td683 NoItinerary, DSPROpnd, uimm3>,
691 NoItinerary, DSPROpnd, uimm3>;
1080 NoItinerary, DSPROpnd, uimm3>;
1087 uimm3>;
H A DMips64r6InstrInfo.td60 class DALIGN_DESC : ALIGN_DESC_BASE<"dalign", GPR64Opnd, uimm3, II_DALIGN>;
H A DMipsMSAInstrInfo.td2260 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, uimm3,
2304 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", insve_v8i16, uimm3, timmZExt3,
2530 class SAT_S_B_DESC : MSA_BIT_X_DESC_BASE<"sat_s.b", int_mips_sat_s_b, uimm3,
2539 class SAT_U_B_DESC : MSA_BIT_X_DESC_BASE<"sat_u.b", int_mips_sat_u_b, uimm3,
2561 MSA128HOpnd, MSA128HOpnd, uimm3,
2621 class SRARI_B_DESC : MSA_BIT_X_DESC_BASE<"srari.b", int_mips_srari_b, uimm3,
2649 class SRLRI_B_DESC : MSA_BIT_X_DESC_BASE<"srlri.b", int_mips_srlri_b, uimm3,
H A DMicroMips32r6InstrInfo.td594 dag InOperandList = (ins HWRegsOpnd:$rs, uimm3:$sel);
661 dag InOperandList = (ins SrcRC:$rt, uimm3:$sel);
719 dag InOperandList = (ins SrcRC:$rs, uimm3:$sel);
H A DMicroMipsInstrInfo.td598 InstSE<(outs DstRC:$rt), (ins SrcRC:$rs, uimm3:$sel),
605 InstSE<(outs DstRC:$rs), (ins SrcRC:$rt, uimm3:$sel),
H A DMipsInstrInfo.td646 // uimm3 < simm4 < uimm4 < simm4
1863 InstSE<(outs RO:$rt), (ins RD:$rd, uimm3:$sel),
1870 InstSE<(outs RO:$rd), (ins RD:$rt, uimm3:$sel),
/openbsd/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td201 def uimm3 : Operand<XLenVT> {
1095 uimm3:$funct3,
1104 uimm3:$funct3,
1108 def InsnB : DirectiveInsnB<(outs), (ins uimm7_opcode:$opcode, uimm3:$funct3,
1118 def InsnS : DirectiveInsnS<(outs), (ins uimm7_opcode:$opcode, uimm3:$funct3,
1130 (InsnR AnyReg:$rd, uimm7_opcode:$opcode, uimm3:$funct3, uimm7:$funct7,
1140 (InsnI AnyReg:$rd, uimm7_opcode:$opcode, uimm3:$funct3, AnyReg:$rs1,
1143 (InsnI_Mem AnyReg:$rd, uimm7_opcode:$opcode, uimm3:$funct3,
1146 (InsnB uimm7_opcode:$opcode, uimm3:$funct3, AnyReg:$rs1,
1150 (InsnB uimm7_opcode:$opcode, uimm3:$funct3, AnyReg:$rs1,
[all …]
/openbsd/gnu/usr.bin/binutils-2.17/cpu/
H A Dm32r.cpu470 (dnf f-uimm3 "uimm3" () 5 3)
665 (dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-uint f-uimm3)
2399 "bset $uimm3,@($slo16,$sr)"
2400 (+ OP1_10 (f-bit4 0) uimm3 OP2_6 sr slo16)
2403 (sll USI (const 1) (sub (const 7) uimm3))))
2410 "bclr $uimm3,@($slo16,$sr)"
2411 (+ OP1_10 (f-bit4 0) uimm3 OP2_7 sr slo16)
2414 (inv QI (sll USI (const 1) (sub (const 7) uimm3)))))
2421 "btst $uimm3,$sr"
2422 (+ OP1_0 (f-bit4 0) uimm3 OP2_15 sr)
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/VE/
H A DVEInstrVec.td39 def LVMyir_y : Pseudo<(outs VM512:$vx), (ins uimm3:$sy, I64:$sz, VM512:$vd),
42 (ins uimm3:$sy, mimm:$sz, VM512:$vd),
45 def LVMyir : Pseudo<(outs VM512:$vx), (ins uimm3:$sy, I64:$sz),
47 def LVMyim : Pseudo<(outs VM512:$vx), (ins uimm3:$sy, mimm:$sz),
49 def SVMyi : Pseudo<(outs I64:$sx), (ins VM512:$vz, uimm3:$sy),
646 (ins RC:$vz, uimm3:$sy, I64:$sz)>;
649 (ins RC:$vz, uimm3:$sy, mimm:$sz)>;
H A DVEInstrInfo.td151 // uimm3 - Generic immediate value.
155 def uimm3 : Operand<i32>, PatLeaf<(imm), [{
941 def ri : RR<opc, (outs RC:$sx), (ins RC:$sy, uimm3:$sz),
943 let cy = 0 in def ii : RR<opc, (outs RC:$sx), (ins simm7:$sy, uimm3:$sz),
1177 def FENCEC : RRFENCE<0x20, (outs), (ins uimm3:$kind), "fencec $kind"> {
H A DVEInstrIntrinsicVL.gen.td1653 def : Pat<(int_ve_vl_fidcr_sss i64:$sy, uimm3:$I), (FIDCRri i64:$sy, (LO7 $I))>;
1654 def : Pat<(int_ve_vl_fidcr_sss uimm7:$N, uimm3:$I), (FIDCRii (ULO7 $N), (LO7 $I))>;
1657 def : Pat<(int_ve_vl_fencec_s uimm3:$I), (FENCEC (LO7 $I))>;
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A Dbfin-dis.c378 #define uimm3(x) fmtconst (c_uimm3, x, 0, outf) macro
911 OUTS (outf, uimm3 (y)); in decode_CCflag_0()
919 OUTS (outf, uimm3 (y)); in decode_CCflag_0()
985 OUTS (outf, uimm3 (y)); in decode_CCflag_0()
993 OUTS (outf, uimm3 (y)); in decode_CCflag_0()
/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td194 def uimm3 : Operand<GRLenVT> {
641 def BYTEPICK_D : ALU_3RI3<0b00000000000011, "bytepick.d", uimm3>;
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td274 def uimm3 : uimm<3>;