Home
last modified time | relevance | path

Searched refs:umc_reg_offset (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dumc_v6_1.c95 uint32_t umc_reg_offset) in umc_v6_1_clear_error_count_per_channel() argument
120 umc_reg_offset) * 4); in umc_v6_1_clear_error_count_per_channel()
133 umc_reg_offset) * 4); in umc_v6_1_clear_error_count_per_channel()
149 uint32_t umc_reg_offset = 0; in umc_v6_1_clear_error_count() local
162 umc_reg_offset); in umc_v6_1_clear_error_count()
261 uint32_t umc_reg_offset = 0; in umc_v6_1_query_ras_error_count() local
278 umc_reg_offset, in umc_v6_1_query_ras_error_count()
281 umc_reg_offset, in umc_v6_1_query_ras_error_count()
297 uint32_t umc_reg_offset, in umc_v6_1_query_error_address() argument
360 uint32_t umc_reg_offset = 0; in umc_v6_1_query_ras_error_address() local
[all …]
H A Dumc_v6_7.c100 uint32_t umc_reg_offset; in umc_v6_7_ecc_info_query_correctable_error_count() local
142 uint32_t umc_reg_offset; in umc_v6_7_ecc_info_querry_uncorrectable_error_count() local
367 uint32_t umc_reg_offset = in umc_v6_7_reset_error_count_per_channel() local
392 umc_reg_offset) * 4); in umc_v6_7_reset_error_count_per_channel()
417 uint32_t umc_reg_offset = in umc_v6_7_query_ecc_error_count() local
421 umc_reg_offset, in umc_v6_7_query_ecc_error_count()
426 umc_reg_offset, in umc_v6_7_query_ecc_error_count()
448 uint32_t umc_reg_offset = in umc_v6_7_query_error_address() local
493 uint32_t umc_reg_offset) in umc_v6_7_query_ras_poison_mode_per_channel() argument
500 umc_reg_offset) * 4); in umc_v6_7_query_ras_poison_mode_per_channel()
[all …]
H A Dumc_v8_7.c181 uint32_t umc_reg_offset) in umc_v8_7_clear_error_count_per_channel() argument
193 umc_reg_offset) * 4); in umc_v8_7_clear_error_count_per_channel()
206 umc_reg_offset) * 4); in umc_v8_7_clear_error_count_per_channel()
222 uint32_t umc_reg_offset = 0; in umc_v8_7_clear_error_count() local
230 umc_reg_offset); in umc_v8_7_clear_error_count()
308 uint32_t umc_reg_offset = 0; in umc_v8_7_query_ras_error_count() local
316 umc_reg_offset, in umc_v8_7_query_ras_error_count()
319 umc_reg_offset, in umc_v8_7_query_ras_error_count()
328 uint32_t umc_reg_offset, in umc_v8_7_query_error_address() argument
375 uint32_t umc_reg_offset = 0; in umc_v8_7_query_ras_error_address() local
[all …]
H A Dumc_v8_10.c84 uint32_t umc_reg_offset = in umc_v8_10_clear_error_count_per_channel() local
91 WREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4, in umc_v8_10_clear_error_count_per_channel()
104 uint32_t umc_reg_offset, in umc_v8_10_query_correctable_error_count() argument
124 uint32_t umc_reg_offset, in umc_v8_10_query_uncorrectable_error_count() argument
148 uint32_t umc_reg_offset = in umc_v8_10_query_ecc_error_count() local
152 umc_reg_offset, in umc_v8_10_query_ecc_error_count()
155 umc_reg_offset, in umc_v8_10_query_ecc_error_count()
252 uint32_t umc_reg_offset = in umc_v8_10_query_error_address() local
274 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v8_10_query_error_address()
282 WREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4, 0x0ULL); in umc_v8_10_query_error_address()
[all …]