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Searched refs:v30 (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c229 struct atom_vram_info_header_v3_0 v30; member
236 struct atom_vram_module_v3_0 v30; member
392 vram_module = (union vram_module *)vram_info->v30.vram_module; in amdgpu_atomfirmware_get_vram_info()
393 mem_vendor = (vram_module->v30.dram_vendor_id) & 0xF; in amdgpu_atomfirmware_get_vram_info()
396 mem_type = vram_info->v30.memory_type; in amdgpu_atomfirmware_get_vram_info()
399 mem_channel_number = vram_info->v30.channel_num; in amdgpu_atomfirmware_get_vram_info()
400 mem_channel_width = vram_info->v30.channel_width; in amdgpu_atomfirmware_get_vram_info()
668 struct atom_gfx_info_v3_0 v30; member
830 adev->gfx.config.max_shader_engines = gfx_info->v30.max_shader_engines; in amdgpu_atomfirmware_get_gfx_info()
831 adev->gfx.config.max_cu_per_sh = gfx_info->v30.max_cu_per_sh; in amdgpu_atomfirmware_get_gfx_info()
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/openbsd/gnu/gcc/gcc/config/rs6000/
H A Ddarwin-vecsave.asm71 stvx v30,r11,r0
99 lvx v30,r11,r0
129 stvx v30,r11,r0
160 lvx v30,r11,r0
H A Ddarwin-world.asm153 stvx v30,r11,r12
242 lvx v30,r11,r12
/openbsd/gnu/llvm/compiler-rt/lib/tsan/rtl/
H A Dtsan_ppc_regs.h95 #define v30 30 macro
H A Dtsan_rtl_ppc64.S125 stvx v30,0,r5
270 stvx v30,0,r5
/openbsd/gnu/llvm/lldb/source/Utility/
H A DARM64_DWARF_Registers.h111 v30, enumerator
H A DARM64_ehframe_Registers.h110 v30, enumerator
/openbsd/gnu/llvm/lldb/source/Plugins/Process/Utility/
H A DRegisterContextFreeBSD_powerpc.cpp164 uint32_t v30[4]; member
H A DRegisterInfos_arm64.h643 DEFINE_VREG(v30),
677 DEFINE_FPU_PSEUDO(s30, 4, FPU_S_PSEUDO_REG_ENDIAN_OFFSET, v30),
710 DEFINE_FPU_PSEUDO(d30, 8, FPU_D_PSEUDO_REG_ENDIAN_OFFSET, v30),
H A DRegisterInfos_powerpc.h159 DEFINE_VMX(v30, LLDB_INVALID_REGNUM), \
H A DRegisterInfos_arm64_sve.h439 DEFINE_VREG_SVE(v30, z30),
H A DRegisterContextDarwin_arm64.cpp834 case arm64_dwarf::v30: in ConvertRegisterKindToRegisterNumber()
/openbsd/sys/arch/arm64/arm64/
H A Daesv8-armx.S611 eor v30.16b,v27.16b,v7.16b
627 eor v30.16b,v30.16b,v25.16b
636 st1 {v30.16b},[x1],#16
659 eor v30.16b,v30.16b,v25.16b
663 st1 {v30.16b},[x1],#16
/openbsd/usr.bin/mg/
H A DREADME27 v30, the current version contains the work of:
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPC.td266 def FeatureISA3_0 : SubtargetFeature<"isa-v30-instructions", "IsISA3_0",
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td267 def WR15: Rd<31, "v30:31", [V30, V31, VFR15]>, DwarfRegNum<[176]>;
H A DHexagonPatternsHVX.td938 // v29:28.b = vshuffoe(v31.b,v30.b) ; collect odd/even bytes, masks = v29
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td399 def D30 : AArch64Reg<30, "d30", [S30], ["v30", ""]>, DwarfRegAlias<B30>;
434 def Q30 : AArch64Reg<30, "q30", [D30], ["v30", ""]>, DwarfRegAlias<B30>;