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Searched refs:vaddr0 (Results 1 – 9 of 9) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp353 int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction() local
354 AMDGPU::OpName::vaddr0); in encodeInstruction()
357 assert(vaddr0 >= 0 && srsrc > vaddr0); in encodeInstruction()
358 unsigned NumExtraAddrs = srsrc - vaddr0 - 1; in encodeInstruction()
362 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DMIMGInstructions.td372 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, DMask:$dmask,
397 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, DMask:$dmask,
541 let InOperandList = !con((ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
725 let InOperandList = (ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
755 let InOperandList = (ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
903 let AsmString = opcode#" $vdata, $vaddr0, $srsrc, $ssamp$dmask$dim$unorm"
930 let AsmString = opcode#" $vdata, $vaddr0, $srsrc, $ssamp$dmask$dim$unorm"
1150 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_128:$srsrc),
1152 let AsmString = opcode#" $vdata, $vaddr0, $srsrc"#!if(IsA16, "$a16", "");
1168 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_128:$srsrc),
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H A DSIInstrFormats.td361 bits<8> vaddr0;
372 let Inst{39-32} = vaddr0;
388 bits<8> vaddr0;
404 let Inst{39-32} = vaddr0;
H A DGCNNSAReassign.cpp176 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in CheckNSA()
287 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::vaddr0); in runOnMachineFunction()
H A DSILoadStoreOptimizer.cpp416 !AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vaddr0)) in getInstClass()
616 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getRegs()
762 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0) + J; in setMI()
H A DSIShrinkInstructions.cpp278 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in shrinkMIMG()
H A DSIInstrInfo.cpp400 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getMemOperandsWithOffsetWidth()
4609 AMDGPU::OpName::vaddr0); in verifyInstruction()
7633 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getInstSizeInBytes()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp654 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in getInstruction()
885 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in convertMIMGInst()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3661 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in validateMIMGAddrSize()