1 /*-
2 * This code is derived from software copyrighted by the Free Software
3 * Foundation.
4 *
5 * Modified 1991 by Donn Seeley at UUNET Technologies, Inc.
6 */
7
8 #ifndef lint
9 static char sccsid[] = "@(#)i386.c 6.4 (Berkeley) 05/08/91";
10 #endif /* not lint */
11
12 /* i386.c -- Assemble code for the Intel 80386
13 Copyright (C) 1989, Free Software Foundation.
14
15 This file is part of GAS, the GNU Assembler.
16
17 GAS is free software; you can redistribute it and/or modify
18 it under the terms of the GNU General Public License as published by
19 the Free Software Foundation; either version 1, or (at your option)
20 any later version.
21
22 GAS is distributed in the hope that it will be useful,
23 but WITHOUT ANY WARRANTY; without even the implied warranty of
24 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 GNU General Public License for more details.
26
27 You should have received a copy of the GNU General Public License
28 along with GAS; see the file COPYING. If not, write to
29 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
30
31 /*
32 Intel 80386 machine specific gas.
33 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
34 Bugs & suggestions are completely welcome. This is free software.
35 Please help us make it better.
36 */
37
38 #include <stdio.h>
39 #include <varargs.h>
40 #include <ctype.h>
41
42 #ifdef __GNUC__
43 #define alloca __builtin_alloca
44 #else
45 extern char *alloca();
46 #endif
47 #ifdef USG
48 #define index strchr
49 #endif
50
51 #include "as.h"
52 #include "read.h"
53 #include "flonum.h"
54 #include "obstack.h"
55 #include "frags.h"
56 #include "struc-symbol.h"
57 #include "expr.h"
58 #include "symbols.h"
59 #include "hash.h"
60 #include "md.h"
61 #include "i386.h"
62 #include "i386-opcode.h"
63
64 long omagic = OMAGIC;
65 char FLT_CHARS[] = "fFdDxX";
66 char EXP_CHARS[] = "eE";
67 char line_comment_chars[] = "#";
68 char comment_chars[] = "#";
69
70 /* tables for lexical analysis */
71 static char opcode_chars[256];
72 static char register_chars[256];
73 static char operand_chars[256];
74 static char space_chars[256];
75 static char identifier_chars[256];
76 static char digit_chars[256];
77
78 /* lexical macros */
79 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
80 #define is_operand_char(x) (operand_chars[(unsigned char) x])
81 #define is_register_char(x) (register_chars[(unsigned char) x])
82 #define is_space_char(x) (space_chars[(unsigned char) x])
83 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
84 #define is_digit_char(x) (digit_chars[(unsigned char) x])
85
86 /* put here all non-digit non-letter charcters that may occur in an operand */
87 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:";
88
89 static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */
90
91 /* md_assemble() always leaves the strings it's passed unaltered. To
92 effect this we maintain a stack of saved characters that we've smashed
93 with '\0's (indicating end of strings for various sub-fields of the
94 assembler instruction). */
95 static char save_stack[32];
96 static char *save_stack_p; /* stack pointer */
97 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
98 #define RESTORE_END_STRING(s) *s = *--save_stack_p
99
100 /* The instruction we're assembling. */
101 static i386_insn i;
102
103 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
104 static expressionS disp_expressions[2], im_expressions[2];
105
106 /* pointers to ebp & esp entries in reg_hash hash table */
107 static reg_entry *ebp, *esp;
108
109 static int this_operand; /* current operand we are working on */
110
111 /*
112 Interface to relax_segment.
113 There are 2 relax states for 386 jump insns: one for conditional & one
114 for unconditional jumps. This is because the these two types of jumps
115 add different sizes to frags when we're figuring out what sort of jump
116 to choose to reach a given label. */
117
118 /* types */
119 #define COND_JUMP 1 /* conditional jump */
120 #define UNCOND_JUMP 2 /* unconditional jump */
121 /* sizes */
122 #define BYTE 0
123 #define WORD 1
124 #define DWORD 2
125 #define UNKNOWN_SIZE 3
126
127 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
128 #define SIZE_FROM_RELAX_STATE(s) \
129 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
130
131 const relax_typeS md_relax_table[] = {
132 /*
133 The fields are:
134 1) most positive reach of this state,
135 2) most negative reach of this state,
136 3) how many bytes this mode will add to the size of the current frag
137 4) which index into the table to try if we can't fit into this one.
138 */
139 {1, 1, 0, 0},
140 {1, 1, 0, 0},
141 {1, 1, 0, 0},
142 {1, 1, 0, 0},
143
144 /* For now we don't use word displacement jumps: they may be
145 untrustworthy. */
146 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
147 /* word conditionals add 3 bytes to frag:
148 2 opcode prefix; 1 displacement bytes */
149 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
150 /* dword conditionals adds 4 bytes to frag:
151 1 opcode prefix; 3 displacement bytes */
152 {0, 0, 4, 0},
153 {1, 1, 0, 0},
154
155 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
156 /* word jmp adds 2 bytes to frag:
157 1 opcode prefix; 1 displacement bytes */
158 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
159 /* dword jmp adds 3 bytes to frag:
160 0 opcode prefix; 3 displacement bytes */
161 {0, 0, 3, 0},
162 {1, 1, 0, 0},
163
164 };
165
166 void float_cons (), cons ();
167
168 /* Ignore certain directives generated by gcc. This probably should
169 not be here. */
dummy()170 void dummy ()
171 {
172 while (*input_line_pointer && *input_line_pointer != '\n')
173 input_line_pointer++;
174 }
175
176 const pseudo_typeS md_pseudo_table[] = {
177 { "ffloat", float_cons, 'f' },
178 { "dfloat", float_cons, 'd' },
179 { "tfloat", float_cons, 'x' },
180 { "value", cons, 2 },
181 { "ident", dummy, 0 }, /* ignore these directives */
182 { "def", dummy, 0 },
183 { "optim", dummy, 0 }, /* For sun386i cc */
184 { "version", dummy, 0 },
185 { "ln", dummy, 0 },
186 { 0, 0, 0 }
187 };
188
189 /* for interface with expression () */
190 extern char * input_line_pointer;
191 char * index ();
192
193 char * output_invalid ();
194 reg_entry * parse_register ();
195
196 /* obstack for constructing various things in md_begin */
197 struct obstack o;
198
199 /* hash table for opcode lookup */
200 static struct hash_control *op_hash = (struct hash_control *) 0;
201 /* hash table for register lookup */
202 static struct hash_control *reg_hash = (struct hash_control *) 0;
203 /* hash table for prefix lookup */
204 static struct hash_control *prefix_hash = (struct hash_control *) 0;
205
206
md_begin()207 void md_begin ()
208 {
209 char * hash_err;
210
211 obstack_begin (&o,4096);
212
213 /* initialize op_hash hash table */
214 op_hash = hash_new(); /* xmalloc handles error */
215
216 {
217 register template *optab;
218 register templates *core_optab;
219 char *prev_name;
220
221 optab = i386_optab; /* setup for loop */
222 prev_name = optab->name;
223 obstack_grow (&o, optab, sizeof(template));
224 core_optab = (templates *) xmalloc (sizeof (templates));
225
226 for (optab++; optab < i386_optab_end; optab++) {
227 if (! strcmp (optab->name, prev_name)) {
228 /* same name as before --> append to current template list */
229 obstack_grow (&o, optab, sizeof(template));
230 } else {
231 /* different name --> ship out current template list;
232 add to hash table; & begin anew */
233 /* Note: end must be set before start! since obstack_next_free changes
234 upon opstack_finish */
235 core_optab->end = (template *) obstack_next_free(&o);
236 core_optab->start = (template *) obstack_finish(&o);
237 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
238 if (hash_err && *hash_err) {
239 hash_error:
240 as_fatal("Internal Error: Can't hash %s: %s",prev_name, hash_err);
241 }
242 prev_name = optab->name;
243 core_optab = (templates *) xmalloc (sizeof(templates));
244 obstack_grow (&o, optab, sizeof(template));
245 }
246 }
247 }
248
249 /* initialize reg_hash hash table */
250 reg_hash = hash_new();
251 {
252 register reg_entry *regtab;
253
254 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) {
255 hash_err = hash_insert (reg_hash, regtab->reg_name, regtab);
256 if (hash_err && *hash_err) goto hash_error;
257 }
258 }
259
260 esp = (reg_entry *) hash_find (reg_hash, "esp");
261 ebp = (reg_entry *) hash_find (reg_hash, "ebp");
262
263 /* initialize reg_hash hash table */
264 prefix_hash = hash_new();
265 {
266 register prefix_entry *prefixtab;
267
268 for (prefixtab = i386_prefixtab;
269 prefixtab < i386_prefixtab_end; prefixtab++) {
270 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab);
271 if (hash_err && *hash_err) goto hash_error;
272 }
273 }
274
275 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
276 {
277 register unsigned int c;
278
279 bzero (opcode_chars, sizeof(opcode_chars));
280 bzero (operand_chars, sizeof(operand_chars));
281 bzero (space_chars, sizeof(space_chars));
282 bzero (identifier_chars, sizeof(identifier_chars));
283 bzero (digit_chars, sizeof(digit_chars));
284
285 for (c = 0; c < 256; c++) {
286 if (islower(c) || isdigit(c)) {
287 opcode_chars[c] = c;
288 register_chars[c] = c;
289 } else if (isupper(c)) {
290 opcode_chars[c] = tolower(c);
291 register_chars[c] = opcode_chars[c];
292 } else if (c == PREFIX_SEPERATOR) {
293 opcode_chars[c] = c;
294 } else if (c == ')' || c == '(') {
295 register_chars[c] = c;
296 }
297
298 if (isupper(c) || islower(c) || isdigit(c))
299 operand_chars[c] = c;
300 else if (c && index(operand_special_chars, c))
301 operand_chars[c] = c;
302
303 if (isdigit(c) || c == '-') digit_chars[c] = c;
304
305 if (isalpha(c) || c == '_' || c == '.' || isdigit(c))
306 identifier_chars[c] = c;
307
308 if (c == ' ' || c == '\t') space_chars[c] = c;
309 }
310 }
311 }
312
md_end()313 void md_end() {} /* not much to do here. */
314
315
316 #ifdef DEBUG386
317
318 /* debugging routines for md_assemble */
319 static void pi (), pte (), pt (), pe (), ps ();
320
pi(line,x)321 static void pi (line, x)
322 char * line;
323 i386_insn *x;
324 {
325 register template *p;
326 int i;
327
328 fprintf (stdout, "%s: template ", line);
329 pte (&x->tm);
330 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
331 x->rm.mode, x->rm.reg, x->rm.regmem);
332 fprintf (stdout, " base %x index %x scale %x\n",
333 x->bi.base, x->bi.index, x->bi.scale);
334 for (i = 0; i < x->operands; i++) {
335 fprintf (stdout, " #%d: ", i+1);
336 pt (x->types[i]);
337 fprintf (stdout, "\n");
338 if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name);
339 if (x->types[i] & Imm) pe (x->imms[i]);
340 if (x->types[i] & (Disp|Abs)) pe (x->disps[i]);
341 }
342 }
343
pte(t)344 static void pte (t)
345 template *t;
346 {
347 int i;
348 fprintf (stdout, " %d operands ", t->operands);
349 fprintf (stdout, "opcode %x ",
350 t->base_opcode);
351 if (t->extension_opcode != None)
352 fprintf (stdout, "ext %x ", t->extension_opcode);
353 if (t->opcode_modifier&D)
354 fprintf (stdout, "D");
355 if (t->opcode_modifier&W)
356 fprintf (stdout, "W");
357 fprintf (stdout, "\n");
358 for (i = 0; i < t->operands; i++) {
359 fprintf (stdout, " #%d type ", i+1);
360 pt (t->operand_types[i]);
361 fprintf (stdout, "\n");
362 }
363 }
364
365 char *seg_names[] = {
366 "SEG_ABSOLUTE", "SEG_TEXT", "SEG_DATA", "SEG_BSS", "SEG_UNKNOWN",
367 "SEG_NONE", "SEG_PASS1", "SEG_GOOF", "SEG_BIG", "SEG_DIFFERENCE" };
368
pe(e)369 static void pe (e)
370 expressionS *e;
371 {
372 fprintf (stdout, " segment %s\n", seg_names[(int) e->X_seg]);
373 fprintf (stdout, " add_number %d (%x)\n",
374 e->X_add_number, e->X_add_number);
375 if (e->X_add_symbol) {
376 fprintf (stdout, " add_symbol ");
377 ps (e->X_add_symbol);
378 fprintf (stdout, "\n");
379 }
380 if (e->X_subtract_symbol) {
381 fprintf (stdout, " sub_symbol ");
382 ps (e->X_subtract_symbol);
383 fprintf (stdout, "\n");
384 }
385 }
386
387 #define SYMBOL_TYPE(t) \
388 (((t&N_TYPE) == N_UNDF) ? "UNDEFINED" : \
389 (((t&N_TYPE) == N_ABS) ? "ABSOLUTE" : \
390 (((t&N_TYPE) == N_TEXT) ? "TEXT" : \
391 (((t&N_TYPE) == N_DATA) ? "DATA" : \
392 (((t&N_TYPE) == N_BSS) ? "BSS" : "Bad n_type!")))))
393
ps(s)394 static void ps (s)
395 symbolS *s;
396 {
397 fprintf (stdout, "%s type %s%s",
398 s->sy_nlist.n_un.n_name,
399 (s->sy_nlist.n_type&N_EXT) ? "EXTERNAL " : "",
400 SYMBOL_TYPE (s->sy_nlist.n_type));
401 }
402
403 struct type_name {
404 uint mask;
405 char *tname;
406 } type_names[] = {
407 { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" },
408 { Imm8S, "i8s" },
409 { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"},
410 { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" },
411 { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" },
412 { Disp8, "d8" }, { Disp16, "d16" },
413 { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" },
414 { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" },
415 { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"},
416 { FloatReg, "FReg"}, {FloatAcc, "FAcc"},
417 { JumpAbsolute, "Jump Absolute"},
418 { 0, "" }
419 };
420
pt(t)421 static void pt (t)
422 uint t;
423 {
424 register struct type_name *ty;
425
426 if (t == Unknown) {
427 fprintf (stdout, "Unknown");
428 } else {
429 for (ty = type_names; ty->mask; ty++)
430 if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname);
431 }
432 fflush (stdout);
433 }
434
435 #endif /* DEBUG386 */
436
437 /*
438 This is the guts of the machine-dependent assembler. LINE points to a
439 machine dependent instruction. This funciton is supposed to emit
440 the frags/bytes it assembles to.
441 */
md_assemble(line)442 void md_assemble (line)
443 char *line;
444 {
445 /* Holds temlate once we've found it. */
446 register template * t;
447
448 /* Possible templates for current insn */
449 templates *current_templates = (templates *) 0;
450
451 /* Initialize globals. */
452 bzero (&i, sizeof(i));
453 bzero (disp_expressions, sizeof(disp_expressions));
454 bzero (im_expressions, sizeof(im_expressions));
455 save_stack_p = save_stack; /* reset stack pointer */
456
457 /* Fist parse an opcode & call i386_operand for the operands.
458 We assume that the scrubber has arranged it so that line[0] is the valid
459 start of a (possibly prefixed) opcode. */
460 {
461 register char *l = line; /* Fast place to put LINE. */
462
463 /* TRUE if operand is pending after ','. */
464 uint expecting_operand = 0;
465 /* TRUE if we found a prefix only acceptable with string insns. */
466 uint expecting_string_instruction = 0;
467 /* Non-zero if operand parens not balenced. */
468 uint paren_not_balenced;
469 char * token_start = l;
470
471 while (! is_space_char(*l) && *l != END_OF_INSN) {
472 if (! is_opcode_char(*l)) {
473 as_bad ("invalid character %s in opcode", output_invalid(*l));
474 return;
475 } else if (*l != PREFIX_SEPERATOR) {
476 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */
477 l++;
478 } else { /* this opcode's got a prefix */
479 register int q;
480 register prefix_entry * prefix;
481
482 if (l == token_start) {
483 as_bad ("expecting prefix; got nothing");
484 return;
485 }
486 END_STRING_AND_SAVE (l);
487 prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
488 if (! prefix) {
489 as_bad ("no such opcode prefix ('%s')", token_start);
490 return;
491 }
492 RESTORE_END_STRING (l);
493 /* check for repeated prefix */
494 for (q = 0; q < i.prefixes; q++)
495 if (i.prefix[q] == prefix->prefix_code) {
496 as_bad ("same prefix used twice; you don't really want this!");
497 return;
498 }
499 if (i.prefixes == MAX_PREFIXES) {
500 as_bad ("too many opcode prefixes");
501 return;
502 }
503 i.prefix[i.prefixes++] = prefix->prefix_code;
504 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
505 expecting_string_instruction = TRUE;
506 /* skip past PREFIX_SEPERATOR and reset token_start */
507 token_start = ++l;
508 }
509 }
510 END_STRING_AND_SAVE (l);
511 if (token_start == l) {
512 as_bad ("expecting opcode; got nothing");
513 return;
514 }
515
516 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
517 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
518 current_templates = (templates *) hash_find (op_hash, token_start);
519 if (! current_templates) {
520 int last_index = strlen(token_start) - 1;
521 char last_char = token_start[last_index];
522 switch (last_char) {
523 case DWORD_OPCODE_SUFFIX:
524 case WORD_OPCODE_SUFFIX:
525 case BYTE_OPCODE_SUFFIX:
526 token_start[last_index] = '\0';
527 current_templates = (templates *) hash_find (op_hash, token_start);
528 token_start[last_index] = last_char;
529 i.suffix = last_char;
530 }
531 if (!current_templates) {
532 as_bad ("no such 386 instruction: `%s'", token_start); return;
533 }
534 }
535 RESTORE_END_STRING (l);
536
537 /* check for rep/repne without a string instruction */
538 if (expecting_string_instruction &&
539 ! IS_STRING_INSTRUCTION (current_templates->
540 start->base_opcode)) {
541 as_bad ("expecting string instruction after rep/repne");
542 return;
543 }
544
545 /* There may be operands to parse. */
546 if (*l != END_OF_INSN &&
547 /* For string instructions, we ignore any operands if given. This
548 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
549 the operands are always going to be the same, and are not really
550 encoded in machine code. */
551 ! IS_STRING_INSTRUCTION (current_templates->
552 start->base_opcode)) {
553 /* parse operands */
554 do {
555 /* skip optional white space before operand */
556 while (! is_operand_char(*l) && *l != END_OF_INSN) {
557 if (! is_space_char(*l)) {
558 as_bad ("invalid character %s before %s operand",
559 output_invalid(*l),
560 ordinal_names[i.operands]);
561 return;
562 }
563 l++;
564 }
565 token_start = l; /* after white space */
566 paren_not_balenced = 0;
567 while (paren_not_balenced || *l != ',') {
568 if (*l == END_OF_INSN) {
569 if (paren_not_balenced) {
570 as_bad ("unbalenced parenthesis in %s operand.",
571 ordinal_names[i.operands]);
572 return;
573 } else break; /* we are done */
574 } else if (! is_operand_char(*l)) {
575 as_bad ("invalid character %s in %s operand",
576 output_invalid(*l),
577 ordinal_names[i.operands]);
578 return;
579 }
580 if (*l == '(') ++paren_not_balenced;
581 if (*l == ')') --paren_not_balenced;
582 l++;
583 }
584 if (l != token_start) { /* yes, we've read in another operand */
585 uint operand_ok;
586 this_operand = i.operands++;
587 if (i.operands > MAX_OPERANDS) {
588 as_bad ("spurious operands; (%d operands/instruction max)",
589 MAX_OPERANDS);
590 return;
591 }
592 /* now parse operand adding info to 'i' as we go along */
593 END_STRING_AND_SAVE (l);
594 operand_ok = i386_operand (token_start);
595 RESTORE_END_STRING (l); /* restore old contents */
596 if (!operand_ok) return;
597 } else {
598 if (expecting_operand) {
599 expecting_operand_after_comma:
600 as_bad ("expecting operand after ','; got nothing");
601 return;
602 }
603 if (*l == ',') {
604 as_bad ("expecting operand before ','; got nothing");
605 return;
606 }
607 }
608
609 /* now *l must be either ',' or END_OF_INSN */
610 if (*l == ',') {
611 if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */
612 goto expecting_operand_after_comma;
613 }
614 expecting_operand = TRUE;
615 }
616 } while (*l != END_OF_INSN); /* until we get end of insn */
617 }
618 }
619
620 /* Now we've parsed the opcode into a set of templates, and have the
621 operands at hand.
622 Next, we find a template that matches the given insn,
623 making sure the overlap of the given operands types is consistent
624 with the template operand types. */
625
626 #define MATCH(overlap,given_type) \
627 (overlap && \
628 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
629 == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
630
631 /* If m0 and m1 are register matches they must be consistent
632 with the expected operand types t0 and t1.
633 That is, if both m0 & m1 are register matches
634 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
635 then, either 1. or 2. must be true:
636 1. the expected operand type register overlap is null:
637 (t0 & t1 & Reg) == 0
638 AND
639 the given register overlap is null:
640 (m0 & m1 & Reg) == 0
641 2. the expected operand type register overlap == the given
642 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
643 */
644 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
645 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
646 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
647 ((t0 & t1) & (m0 & m1) & (Reg)) \
648 ) : 1)
649 {
650 register uint overlap0, overlap1;
651 expressionS * exp;
652 uint overlap2;
653 uint found_reverse_match;
654
655 overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
656 for (t = current_templates->start;
657 t < current_templates->end;
658 t++) {
659
660 /* must have right number of operands */
661 if (i.operands != t->operands) continue;
662 else if (!t->operands) break; /* 0 operands always matches */
663
664 overlap0 = i.types[0] & t->operand_types[0];
665 switch (t->operands) {
666 case 1:
667 if (! MATCH (overlap0,i.types[0])) continue;
668 break;
669 case 2: case 3:
670 overlap1 = i.types[1] & t->operand_types[1];
671 if (! MATCH (overlap0,i.types[0]) ||
672 ! MATCH (overlap1,i.types[1]) ||
673 ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1,
674 t->operand_types[0],
675 t->operand_types[1])) {
676
677 /* check if other direction is valid ... */
678 if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
679 continue;
680
681 /* try reversing direction of operands */
682 overlap0 = i.types[0] & t->operand_types[1];
683 overlap1 = i.types[1] & t->operand_types[0];
684 if (! MATCH (overlap0,i.types[0]) ||
685 ! MATCH (overlap1,i.types[1]) ||
686 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
687 t->operand_types[0],
688 t->operand_types[1])) {
689 /* does not match either direction */
690 continue;
691 }
692 /* found a reverse match here -- slip through */
693 /* found_reverse_match holds which of D or FloatD we've found */
694 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
695 } /* endif: not forward match */
696 /* found either forward/reverse 2 operand match here */
697 if (t->operands == 3) {
698 overlap2 = i.types[2] & t->operand_types[2];
699 if (! MATCH (overlap2,i.types[2]) ||
700 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
701 t->operand_types[0],
702 t->operand_types[2]) ||
703 ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2,
704 t->operand_types[1],
705 t->operand_types[2]))
706 continue;
707 }
708 /* found either forward/reverse 2 or 3 operand match here:
709 slip through to break */
710 }
711 break; /* we've found a match; break out of loop */
712 } /* for (t = ... */
713 if (t == current_templates->end) { /* we found no match */
714 as_bad ("operands given don't match any known 386 instruction");
715 return;
716 }
717
718 /* Copy the template we found (we may change it!). */
719 bcopy (t, &i.tm, sizeof (template));
720 t = &i.tm; /* alter new copy of template */
721
722 /* If there's no opcode suffix we try to invent one based on register
723 operands. */
724 if (! i.suffix && i.reg_operands) {
725 /* We take i.suffix from the LAST register operand specified. This
726 assumes that the last register operands is the destination register
727 operand. */
728 int o;
729 for (o = 0; o < MAX_OPERANDS; o++)
730 if (i.types[o] & Reg) {
731 i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX :
732 (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX :
733 DWORD_OPCODE_SUFFIX;
734 }
735 }
736
737 /* Make still unresolved immediate matches conform to size of immediate
738 given in i.suffix. Note: overlap2 cannot be an immediate!
739 We assume this. */
740 if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32))
741 && overlap0 != Imm8 && overlap0 != Imm8S
742 && overlap0 != Imm16 && overlap0 != Imm32) {
743 if (! i.suffix) {
744 as_bad ("no opcode suffix given; can't determine immediate size");
745 return;
746 }
747 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
748 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
749 }
750 if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32))
751 && overlap1 != Imm8 && overlap1 != Imm8S
752 && overlap1 != Imm16 && overlap1 != Imm32) {
753 if (! i.suffix) {
754 as_bad ("no opcode suffix given; can't determine immediate size");
755 return;
756 }
757 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
758 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
759 }
760
761 i.types[0] = overlap0;
762 i.types[1] = overlap1;
763 i.types[2] = overlap2;
764
765 if (overlap0 & ImplicitRegister) i.reg_operands--;
766 if (overlap1 & ImplicitRegister) i.reg_operands--;
767 if (overlap2 & ImplicitRegister) i.reg_operands--;
768 if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */
769
770 if (found_reverse_match) {
771 uint save;
772 save = t->operand_types[0];
773 t->operand_types[0] = t->operand_types[1];
774 t->operand_types[1] = save;
775 }
776
777 /* Finalize opcode. First, we change the opcode based on the operand
778 size given by i.suffix: we never have to change things for byte insns,
779 or when no opcode suffix is need to size the operands. */
780
781 if (! i.suffix && (t->opcode_modifier & W)) {
782 as_bad ("no opcode suffix given and no register operands; can't size instruction");
783 return;
784 }
785
786 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) {
787 /* Select between byte and word/dword operations. */
788 if (t->opcode_modifier & W)
789 t->base_opcode |= W;
790 /* Now select between word & dword operations via the
791 operand size prefix. */
792 if (i.suffix == WORD_OPCODE_SUFFIX) {
793 if (i.prefixes == MAX_PREFIXES) {
794 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
795 MAX_PREFIXES);
796 return;
797 }
798 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
799 }
800 }
801
802 /* For insns with operands there are more diddles to do to the opcode. */
803 if (i.operands) {
804 /* If we found a reverse match we must alter the opcode direction bit
805 found_reverse_match holds bit to set (different for int &
806 float insns). */
807
808 if (found_reverse_match) {
809 t->base_opcode |= found_reverse_match;
810 }
811
812 /*
813 The imul $imm, %reg instruction is converted into
814 imul $imm, %reg, %reg. */
815 if (t->opcode_modifier & imulKludge) {
816 i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */
817 i.reg_operands = 2;
818 }
819
820 /* Certain instructions expect the destination to be in the i.rm.reg
821 field. This is by far the exceptional case. For these instructions,
822 if the source operand is a register, we must reverse the i.rm.reg
823 and i.rm.regmem fields. We accomplish this by faking that the
824 two register operands were given in the reverse order. */
825 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) {
826 uint first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
827 uint second_reg_operand = first_reg_operand + 1;
828 reg_entry *tmp = i.regs[first_reg_operand];
829 i.regs[first_reg_operand] = i.regs[second_reg_operand];
830 i.regs[second_reg_operand] = tmp;
831 }
832
833 if (t->opcode_modifier & ShortForm) {
834 /* The register or float register operand is in operand 0 or 1. */
835 uint o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1;
836 /* Register goes in low 3 bits of opcode. */
837 t->base_opcode |= i.regs[o]->reg_num;
838 } else if (t->opcode_modifier & ShortFormW) {
839 /* Short form with 0x8 width bit. Register is always dest. operand */
840 t->base_opcode |= i.regs[1]->reg_num;
841 if (i.suffix == WORD_OPCODE_SUFFIX ||
842 i.suffix == DWORD_OPCODE_SUFFIX)
843 t->base_opcode |= 0x8;
844 } else if (t->opcode_modifier & Seg2ShortForm) {
845 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) {
846 as_bad ("you can't 'pop cs' on the 386.");
847 return;
848 }
849 t->base_opcode |= (i.regs[0]->reg_num << 3);
850 } else if (t->opcode_modifier & Seg3ShortForm) {
851 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
852 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
853 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
854 to change the opcode. */
855 if (i.regs[0]->reg_num == 5)
856 t->base_opcode |= 0x08;
857 } else if (t->opcode_modifier & Modrm) {
858 /* The opcode is completed (modulo t->extension_opcode which must
859 be put into the modrm byte.
860 Now, we make the modrm & index base bytes based on all the info
861 we've collected. */
862
863 /* i.reg_operands MUST be the number of real register operands;
864 implicit registers do not count. */
865 if (i.reg_operands == 2) {
866 uint source, dest;
867 source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1;
868 dest = source + 1;
869 i.rm.mode = 3;
870 /* We must be careful to make sure that all segment/control/test/
871 debug registers go into the i.rm.reg field (despite the whether
872 they are source or destination operands). */
873 if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) {
874 i.rm.reg = i.regs[dest]->reg_num;
875 i.rm.regmem = i.regs[source]->reg_num;
876 } else {
877 i.rm.reg = i.regs[source]->reg_num;
878 i.rm.regmem = i.regs[dest]->reg_num;
879 }
880 } else { /* if it's not 2 reg operands... */
881 if (i.mem_operands) {
882 uint fake_zero_displacement = FALSE;
883 uint o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
884
885 /* Encode memory operand into modrm byte and base index byte. */
886
887 if (i.base_reg == esp && ! i.index_reg) {
888 /* <disp>(%esp) becomes two byte modrm with no index register. */
889 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
890 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
891 i.bi.base = ESP_REG_NUM;
892 i.bi.index = NO_INDEX_REGISTER;
893 i.bi.scale = 0; /* Must be zero! */
894 } else if (i.base_reg == ebp && !i.index_reg) {
895 if (! (i.types[o] & Disp)) {
896 /* Must fake a zero byte displacement.
897 There is no direct way to code '(%ebp)' directly. */
898 fake_zero_displacement = TRUE;
899 /* fake_zero_displacement code does not set this. */
900 i.types[o] |= Disp8;
901 }
902 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
903 i.rm.regmem = EBP_REG_NUM;
904 } else if (! i.base_reg && (i.types[o] & BaseIndex)) {
905 /* There are three cases here.
906 Case 1: '<32bit disp>(,1)' -- indirect absolute.
907 (Same as cases 2 & 3 with NO index register)
908 Case 2: <32bit disp> (,<index>) -- no base register with disp
909 Case 3: (, <index>) --- no base register;
910 no disp (must add 32bit 0 disp). */
911 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
912 i.rm.mode = 0; /* 32bit mode */
913 i.bi.base = NO_BASE_REGISTER;
914 i.types[o] &= ~Disp;
915 i.types[o] |= Disp32; /* Must be 32bit! */
916 if (i.index_reg) { /* case 2 or case 3 */
917 i.bi.index = i.index_reg->reg_num;
918 i.bi.scale = i.log2_scale_factor;
919 if (i.disp_operands == 0)
920 fake_zero_displacement = TRUE; /* case 3 */
921 } else {
922 i.bi.index = NO_INDEX_REGISTER;
923 i.bi.scale = 0;
924 }
925 } else if (i.disp_operands && !i.base_reg && !i.index_reg) {
926 /* Operand is just <32bit disp> */
927 i.rm.regmem = EBP_REG_NUM;
928 i.rm.mode = 0;
929 i.types[o] &= ~Disp;
930 i.types[o] |= Disp32;
931 } else {
932 /* It's not a special case; rev'em up. */
933 i.rm.regmem = i.base_reg->reg_num;
934 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
935 if (i.index_reg) {
936 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
937 i.bi.base = i.base_reg->reg_num;
938 i.bi.index = i.index_reg->reg_num;
939 i.bi.scale = i.log2_scale_factor;
940 if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */
941 fake_zero_displacement = TRUE;
942 i.types[o] |= Disp8;
943 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
944 }
945 }
946 }
947 if (fake_zero_displacement) {
948 /* Fakes a zero displacement assuming that i.types[o] holds
949 the correct displacement size. */
950 exp = &disp_expressions[i.disp_operands++];
951 i.disps[o] = exp;
952 exp->X_seg = SEG_ABSOLUTE;
953 exp->X_add_number = 0;
954 exp->X_add_symbol = (symbolS *) 0;
955 exp->X_subtract_symbol = (symbolS *) 0;
956 }
957
958 /* Select the correct segment for the memory operand. */
959 if (i.seg) {
960 uint seg_index;
961 seg_entry * default_seg;
962
963 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) {
964 seg_index = (i.rm.mode<<3) | i.bi.base;
965 default_seg = two_byte_segment_defaults [seg_index];
966 } else {
967 seg_index = (i.rm.mode<<3) | i.rm.regmem;
968 default_seg = one_byte_segment_defaults [seg_index];
969 }
970 /* If the specified segment is not the default, use an
971 opcode prefix to select it */
972 if (i.seg != default_seg) {
973 if (i.prefixes == MAX_PREFIXES) {
974 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
975 MAX_PREFIXES, i.seg->seg_name);
976 return;
977 }
978 i.prefix[i.prefixes++] = i.seg->seg_prefix;
979 }
980 }
981 }
982
983 /* Fill in i.rm.reg or i.rm.regmem field with register operand
984 (if any) based on t->extension_opcode. Again, we must be careful
985 to make sure that segment/control/debug/test registers are coded
986 into the i.rm.reg field. */
987 if (i.reg_operands) {
988 uint o =
989 (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 :
990 (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2;
991 /* If there is an extension opcode to put here, the register number
992 must be put into the regmem field. */
993 if (t->extension_opcode != None)
994 i.rm.regmem = i.regs[o]->reg_num;
995 else i.rm.reg = i.regs[o]->reg_num;
996
997 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
998 we must set it to 3 to indicate this is a register operand
999 int the regmem field */
1000 if (! i.mem_operands) i.rm.mode = 3;
1001 }
1002
1003 /* Fill in i.rm.reg field with extension opcode (if any). */
1004 if (t->extension_opcode != None)
1005 i.rm.reg = t->extension_opcode;
1006 }
1007 }
1008 }
1009 }
1010
1011 /* Handle conversion of 'int $3' --> special int3 insn. */
1012 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) {
1013 t->base_opcode = INT3_OPCODE;
1014 i.imm_operands = 0;
1015 }
1016
1017 /* We are ready to output the insn. */
1018 {
1019 register char * p;
1020
1021 /* Output jumps. */
1022 if (t->opcode_modifier & Jump) {
1023 int n = i.disps[0]->X_add_number;
1024
1025 switch (i.disps[0]->X_seg) {
1026 case SEG_ABSOLUTE:
1027 if (FITS_IN_SIGNED_BYTE (n)) {
1028 p = frag_more (2);
1029 p[0] = t->base_opcode;
1030 p[1] = n;
1031 #if 0 /* leave out 16 bit jumps - pace */
1032 } else if (FITS_IN_SIGNED_WORD (n)) {
1033 p = frag_more (4);
1034 p[0] = WORD_PREFIX_OPCODE;
1035 p[1] = t->base_opcode;
1036 md_number_to_chars (&p[2], n, 2);
1037 #endif
1038 } else { /* It's an absolute dword displacement. */
1039 if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */
1040 /* unconditional jump */
1041 p = frag_more (5);
1042 p[0] = 0xe9;
1043 md_number_to_chars (&p[1], n, 4);
1044 } else {
1045 /* conditional jump */
1046 p = frag_more (6);
1047 p[0] = TWO_BYTE_OPCODE_ESCAPE;
1048 p[1] = t->base_opcode + 0x10;
1049 md_number_to_chars (&p[2], n, 4);
1050 }
1051 }
1052 break;
1053 default:
1054 /* It's a symbol; end frag & setup for relax.
1055 Make sure there are 6 chars left in the current frag; if not
1056 we'll have to start a new one. */
1057 /* I caught it failing with obstack_room == 6,
1058 so I changed to <= pace */
1059 if (obstack_room (&frags) <= 6) {
1060 frag_wane(frag_now);
1061 frag_new (0);
1062 }
1063 p = frag_more (1);
1064 p[0] = t->base_opcode;
1065 frag_var (rs_machine_dependent,
1066 6, /* 2 opcode/prefix + 4 displacement */
1067 1,
1068 ((uchar) *p == JUMP_PC_RELATIVE
1069 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
1070 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
1071 i.disps[0]->X_add_symbol,
1072 n, p);
1073 break;
1074 }
1075 } else if (t->opcode_modifier & (JumpByte|JumpDword)) {
1076 int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
1077 int n = i.disps[0]->X_add_number;
1078
1079 if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) {
1080 FRAG_APPEND_1_CHAR (t->base_opcode);
1081 } else {
1082 p = frag_more (2); /* opcode can be at most two bytes */
1083 /* put out high byte first: can't use md_number_to_chars! */
1084 *p++ = (t->base_opcode >> 8) & 0xff;
1085 *p = t->base_opcode & 0xff;
1086 }
1087
1088 p = frag_more (size);
1089 switch (i.disps[0]->X_seg) {
1090 case SEG_ABSOLUTE:
1091 md_number_to_chars (p, n, size);
1092 if (size == 1 && ! FITS_IN_SIGNED_BYTE (n)) {
1093 as_bad ("loop/jecx only takes byte displacement; %d shortened to %d",
1094 n, *p);
1095 }
1096 break;
1097 default:
1098 fix_new (frag_now, p - frag_now->fr_literal, size,
1099 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol,
1100 i.disps[0]->X_add_number, 1);
1101 break;
1102 }
1103 } else if (t->opcode_modifier & JumpInterSegment) {
1104 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1105 p[0] = t->base_opcode;
1106 if (i.imms[1]->X_seg == SEG_ABSOLUTE)
1107 md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4);
1108 else
1109 fix_new (frag_now, p + 1 - frag_now->fr_literal, 4,
1110 i.imms[1]->X_add_symbol,
1111 i.imms[1]->X_subtract_symbol,
1112 i.imms[1]->X_add_number, 0);
1113 if (i.imms[0]->X_seg != SEG_ABSOLUTE)
1114 as_bad ("can't handle non absolute segment in long call/jmp");
1115 md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2);
1116 } else {
1117 /* Output normal instructions here. */
1118 register char *q;
1119
1120 /* First the prefix bytes. */
1121 for (q = i.prefix; q < i.prefix + i.prefixes; q++) {
1122 p = frag_more (1);
1123 md_number_to_chars (p, (uint) *q, 1);
1124 }
1125
1126 /* Now the opcode; be careful about word order here! */
1127 if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) {
1128 FRAG_APPEND_1_CHAR (t->base_opcode);
1129 } else if (FITS_IN_UNSIGNED_WORD(t->base_opcode)) {
1130 p = frag_more (2);
1131 /* put out high byte first: can't use md_number_to_chars! */
1132 *p++ = (t->base_opcode >> 8) & 0xff;
1133 *p = t->base_opcode & 0xff;
1134 } else { /* opcode is either 3 or 4 bytes */
1135 if (t->base_opcode & 0xff000000) {
1136 p = frag_more (4);
1137 *p++ = (t->base_opcode >> 24) & 0xff;
1138 } else p = frag_more (3);
1139 *p++ = (t->base_opcode >> 16) & 0xff;
1140 *p++ = (t->base_opcode >> 8) & 0xff;
1141 *p = (t->base_opcode ) & 0xff;
1142 }
1143
1144 /* Now the modrm byte and base index byte (if present). */
1145 if (t->opcode_modifier & Modrm) {
1146 p = frag_more (1);
1147 /* md_number_to_chars (p, i.rm, 1); */
1148 md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1);
1149 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1150 ==> need second modrm byte. */
1151 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) {
1152 p = frag_more (1);
1153 /* md_number_to_chars (p, i.bi, 1); */
1154 md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1);
1155 }
1156 }
1157
1158 if (i.disp_operands) {
1159 register int n;
1160
1161 for (n = 0; n < i.operands; n++) {
1162 if (i.disps[n]) {
1163 if (i.disps[n]->X_seg == SEG_ABSOLUTE) {
1164 if (i.types[n] & (Disp8|Abs8)) {
1165 p = frag_more (1);
1166 md_number_to_chars (p, i.disps[n]->X_add_number, 1);
1167 } else if (i.types[n] & (Disp16|Abs16)) {
1168 p = frag_more (2);
1169 md_number_to_chars (p, i.disps[n]->X_add_number, 2);
1170 } else { /* Disp32|Abs32 */
1171 p = frag_more (4);
1172 md_number_to_chars (p, i.disps[n]->X_add_number, 4);
1173 }
1174 } else { /* not SEG_ABSOLUTE */
1175 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1176 p = frag_more (4);
1177 fix_new (frag_now, p - frag_now->fr_literal, 4,
1178 i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol,
1179 i.disps[n]->X_add_number, 0);
1180 }
1181 }
1182 }
1183 } /* end displacement output */
1184
1185 /* output immediate */
1186 if (i.imm_operands) {
1187 register int n;
1188
1189 for (n = 0; n < i.operands; n++) {
1190 if (i.imms[n]) {
1191 if (i.imms[n]->X_seg == SEG_ABSOLUTE) {
1192 if (i.types[n] & (Imm8|Imm8S)) {
1193 p = frag_more (1);
1194 md_number_to_chars (p, i.imms[n]->X_add_number, 1);
1195 } else if (i.types[n] & Imm16) {
1196 p = frag_more (2);
1197 md_number_to_chars (p, i.imms[n]->X_add_number, 2);
1198 } else {
1199 p = frag_more (4);
1200 md_number_to_chars (p, i.imms[n]->X_add_number, 4);
1201 }
1202 } else { /* not SEG_ABSOLUTE */
1203 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1204 /* try to support other sizes ... */
1205 int size;
1206 if (i.types[n] & (Imm8|Imm8S))
1207 size = 1;
1208 else if (i.types[n] & Imm16)
1209 size = 2;
1210 else
1211 size = 4;
1212 p = frag_more (size);
1213 fix_new (frag_now, p - frag_now->fr_literal, size,
1214 i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol,
1215 i.imms[n]->X_add_number, 0);
1216 }
1217 }
1218 }
1219 } /* end immediate output */
1220 }
1221
1222 #ifdef DEBUG386
1223 if (flagseen ['D']) {
1224 pi (line, &i);
1225 }
1226 #endif /* DEBUG386 */
1227
1228 }
1229 return;
1230 }
1231
1232 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1233 on error. */
1234
i386_operand(operand_string)1235 int i386_operand (operand_string)
1236 char *operand_string;
1237 {
1238 register char *op_string = operand_string;
1239
1240 /* Address of '\0' at end of operand_string. */
1241 char * end_of_operand_string = operand_string + strlen(operand_string);
1242
1243 /* Start and end of displacement string expression (if found). */
1244 char * displacement_string_start = 0;
1245 char * displacement_string_end;
1246
1247 /* We check for an absolute prefix (differentiating,
1248 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1249 if (*op_string == ABSOLUTE_PREFIX) {
1250 op_string++;
1251 i.types[this_operand] |= JumpAbsolute;
1252 }
1253
1254 /* Check if operand is a register. */
1255 if (*op_string == REGISTER_PREFIX) {
1256 register reg_entry * r;
1257 if (! (r = parse_register (op_string))) {
1258 as_bad ("bad register name ('%s')", op_string);
1259 return 0;
1260 }
1261 /* Check for segment override, rather than segment register by
1262 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1263 if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') {
1264 switch (r->reg_num) {
1265 case 0:
1266 i.seg = &es; break;
1267 case 1:
1268 i.seg = &cs; break;
1269 case 2:
1270 i.seg = &ss; break;
1271 case 3:
1272 i.seg = &ds; break;
1273 case 4:
1274 i.seg = &fs; break;
1275 case 5:
1276 i.seg = &gs; break;
1277 }
1278 op_string += 4; /* skip % <x> s : */
1279 operand_string = op_string; /* Pretend given string starts here. */
1280 if (!is_digit_char(*op_string) && !is_identifier_char(*op_string)
1281 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) {
1282 as_bad ("bad memory operand after segment override");
1283 return 0;
1284 }
1285 /* Handle case of %es:*foo. */
1286 if (*op_string == ABSOLUTE_PREFIX) {
1287 op_string++;
1288 i.types[this_operand] |= JumpAbsolute;
1289 }
1290 goto do_memory_reference;
1291 }
1292 i.types[this_operand] |= r->reg_type;
1293 i.regs[this_operand] = r;
1294 i.reg_operands++;
1295 } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */
1296 char * save_input_line_pointer;
1297 register expressionS *exp;
1298 segT exp_seg;
1299 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) {
1300 as_bad ("only 1 or 2 immediate operands are allowed");
1301 return 0;
1302 }
1303 exp = &im_expressions[i.imm_operands++];
1304 i.imms [this_operand] = exp;
1305 save_input_line_pointer = input_line_pointer;
1306 input_line_pointer = ++op_string; /* must advance op_string! */
1307 exp_seg = expression (exp);
1308 input_line_pointer = save_input_line_pointer;
1309 switch (exp_seg) {
1310 case SEG_NONE: /* missing or bad expr becomes absolute 0 */
1311 as_bad ("missing or invalid immediate expression '%s' taken as 0",
1312 operand_string);
1313 exp->X_seg = SEG_ABSOLUTE;
1314 exp->X_add_number = 0;
1315 exp->X_add_symbol = (symbolS *) 0;
1316 exp->X_subtract_symbol = (symbolS *) 0;
1317 i.types[this_operand] |= Imm;
1318 break;
1319 case SEG_ABSOLUTE:
1320 i.types[this_operand] |= SMALLEST_IMM_TYPE (exp->X_add_number);
1321 break;
1322 case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN:
1323 i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */
1324 break;
1325 default:
1326 seg_unimplemented:
1327 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg);
1328 return 0;
1329 }
1330 /* shorten this type of this operand if the instruction wants
1331 * fewer bits than are present in the immediate. The bit field
1332 * code can put out 'andb $0xffffff, %al', for example. pace
1333 * also 'movw $foo,(%eax)'
1334 */
1335 switch (i.suffix) {
1336 case WORD_OPCODE_SUFFIX:
1337 i.types[this_operand] |= Imm16;
1338 break;
1339 case BYTE_OPCODE_SUFFIX:
1340 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
1341 break;
1342 }
1343 } else if (is_digit_char(*op_string) || is_identifier_char(*op_string)
1344 || *op_string == '(') {
1345 /* This is a memory reference of some sort. */
1346 register char * base_string;
1347 uint found_base_index_form;
1348
1349 do_memory_reference:
1350 if (i.mem_operands == MAX_MEMORY_OPERANDS) {
1351 as_bad ("more than 1 memory reference in instruction");
1352 return 0;
1353 }
1354 i.mem_operands++;
1355
1356 /* Determine type of memory operand from opcode_suffix;
1357 no opcode suffix implies general memory references. */
1358 switch (i.suffix) {
1359 case BYTE_OPCODE_SUFFIX:
1360 i.types[this_operand] |= Mem8;
1361 break;
1362 case WORD_OPCODE_SUFFIX:
1363 i.types[this_operand] |= Mem16;
1364 break;
1365 case DWORD_OPCODE_SUFFIX:
1366 default:
1367 i.types[this_operand] |= Mem32;
1368 }
1369
1370 /* Check for base index form. We detect the base index form by
1371 looking for an ')' at the end of the operand, searching
1372 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1373 after it. */
1374 base_string = end_of_operand_string - 1;
1375 found_base_index_form = FALSE;
1376 if (*base_string == ')') {
1377 uint parens_balenced = 1;
1378 /* We've already checked that the number of left & right ()'s are equal,
1379 so this loop will not be infinite. */
1380 do {
1381 base_string--;
1382 if (*base_string == ')') parens_balenced++;
1383 if (*base_string == '(') parens_balenced--;
1384 } while (parens_balenced);
1385 base_string++; /* Skip past '('. */
1386 if (*base_string == REGISTER_PREFIX || *base_string == ',')
1387 found_base_index_form = TRUE;
1388 }
1389
1390 /* If we can't parse a base index register expression, we've found
1391 a pure displacement expression. We set up displacement_string_start
1392 and displacement_string_end for the code below. */
1393 if (! found_base_index_form) {
1394 displacement_string_start = op_string;
1395 displacement_string_end = end_of_operand_string;
1396 } else {
1397 char *base_reg_name, *index_reg_name, *num_string;
1398 int num;
1399
1400 i.types[this_operand] |= BaseIndex;
1401
1402 /* If there is a displacement set-up for it to be parsed later. */
1403 if (base_string != op_string + 1) {
1404 displacement_string_start = op_string;
1405 displacement_string_end = base_string - 1;
1406 }
1407
1408 /* Find base register (if any). */
1409 if (*base_string != ',') {
1410 base_reg_name = base_string++;
1411 /* skip past register name & parse it */
1412 while (isalpha(*base_string)) base_string++;
1413 if (base_string == base_reg_name+1) {
1414 as_bad ("can't find base register name after '(%c'",
1415 REGISTER_PREFIX);
1416 return 0;
1417 }
1418 END_STRING_AND_SAVE (base_string);
1419 if (! (i.base_reg = parse_register (base_reg_name))) {
1420 as_bad ("bad base register name ('%s')", base_reg_name);
1421 return 0;
1422 }
1423 RESTORE_END_STRING (base_string);
1424 }
1425
1426 /* Now check seperator; must be ',' ==> index reg
1427 OR num ==> no index reg. just scale factor
1428 OR ')' ==> end. (scale factor = 1) */
1429 if (*base_string != ',' && *base_string != ')') {
1430 as_bad ("expecting ',' or ')' after base register in `%s'",
1431 operand_string);
1432 return 0;
1433 }
1434
1435 /* There may index reg here; and there may be a scale factor. */
1436 if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) {
1437 index_reg_name = ++base_string;
1438 while (isalpha(*++base_string));
1439 END_STRING_AND_SAVE (base_string);
1440 if (! (i.index_reg = parse_register(index_reg_name))) {
1441 as_bad ("bad index register name ('%s')", index_reg_name);
1442 return 0;
1443 }
1444 RESTORE_END_STRING (base_string);
1445 }
1446
1447 /* Check for scale factor. */
1448 if (*base_string == ',' && isdigit(*(base_string+1))) {
1449 num_string = ++base_string;
1450 while (is_digit_char(*base_string)) base_string++;
1451 if (base_string == num_string) {
1452 as_bad ("can't find a scale factor after ','");
1453 return 0;
1454 }
1455 END_STRING_AND_SAVE (base_string);
1456 /* We've got a scale factor. */
1457 if (! sscanf (num_string, "%d", &num)) {
1458 as_bad ("can't parse scale factor from '%s'", num_string);
1459 return 0;
1460 }
1461 RESTORE_END_STRING (base_string);
1462 switch (num) { /* must be 1 digit scale */
1463 case 1: i.log2_scale_factor = 0; break;
1464 case 2: i.log2_scale_factor = 1; break;
1465 case 4: i.log2_scale_factor = 2; break;
1466 case 8: i.log2_scale_factor = 3; break;
1467 default:
1468 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num);
1469 return 0;
1470 }
1471 } else {
1472 if (! i.index_reg && *base_string == ',') {
1473 as_bad ("expecting index register or scale factor after ','; got '%c'",
1474 *(base_string+1));
1475 return 0;
1476 }
1477 }
1478 }
1479
1480 /* If there's an expression begining the operand, parse it,
1481 assuming displacement_string_start and displacement_string_end
1482 are meaningful. */
1483 if (displacement_string_start) {
1484 register expressionS * exp;
1485 segT exp_seg;
1486 char * save_input_line_pointer;
1487 exp = &disp_expressions[i.disp_operands];
1488 i.disps [this_operand] = exp;
1489 i.disp_operands++;
1490 save_input_line_pointer = input_line_pointer;
1491 input_line_pointer = displacement_string_start;
1492 END_STRING_AND_SAVE (displacement_string_end);
1493 exp_seg = expression (exp);
1494 if(*input_line_pointer)
1495 as_bad("Ignoring junk '%s' after expression",input_line_pointer);
1496 RESTORE_END_STRING (displacement_string_end);
1497 input_line_pointer = save_input_line_pointer;
1498 switch (exp_seg) {
1499 case SEG_NONE:
1500 /* missing expr becomes absolute 0 */
1501 as_bad ("missing or invalid displacement '%s' taken as 0",
1502 operand_string);
1503 i.types[this_operand] |= (Disp|Abs);
1504 exp->X_seg = SEG_ABSOLUTE;
1505 exp->X_add_number = 0;
1506 exp->X_add_symbol = (symbolS *) 0;
1507 exp->X_subtract_symbol = (symbolS *) 0;
1508 break;
1509 case SEG_ABSOLUTE:
1510 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
1511 break;
1512 case SEG_TEXT: case SEG_DATA: case SEG_BSS:
1513 case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */
1514 i.types[this_operand] |= Disp32;
1515 break;
1516 default:
1517 goto seg_unimplemented;
1518 }
1519 }
1520
1521 /* Make sure the memory operand we've been dealt is valid. */
1522 if (i.base_reg && i.index_reg &&
1523 ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) {
1524 as_bad ("register size mismatch in (base,index,scale) expression");
1525 return 0;
1526 }
1527 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
1528 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) {
1529 as_bad ("base/index register must be 32 bit register");
1530 return 0;
1531 }
1532 if (i.index_reg && i.index_reg == esp) {
1533 as_bad ("%s may not be used as an index register", esp->reg_name);
1534 return 0;
1535 }
1536 } else { /* it's not a memory operand; argh! */
1537 as_bad ("invalid char %s begining %s operand '%s'",
1538 output_invalid(*op_string), ordinal_names[this_operand],
1539 op_string);
1540 return 0;
1541 }
1542 return 1; /* normal return */
1543 }
1544
1545 /*
1546 * md_estimate_size_before_relax()
1547 *
1548 * Called just before relax().
1549 * Any symbol that is now undefined will not become defined.
1550 * Return the correct fr_subtype in the frag.
1551 * Return the initial "guess for fr_var" to caller.
1552 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
1553 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
1554 * Although it may not be explicit in the frag, pretend fr_var starts with a
1555 * 0 value.
1556 */
1557 int
md_estimate_size_before_relax(fragP,segment_type)1558 md_estimate_size_before_relax (fragP, segment_type)
1559 register fragS * fragP;
1560 register int segment_type; /* N_DATA or N_TEXT. */
1561 {
1562 register uchar * opcode;
1563 register int old_fr_fix;
1564
1565 old_fr_fix = fragP -> fr_fix;
1566 opcode = (uchar *) fragP -> fr_opcode;
1567 /* We've already got fragP->fr_subtype right; all we have to do is check
1568 for un-relaxable symbols. */
1569 if ((fragP -> fr_symbol -> sy_type & N_TYPE) != segment_type) {
1570 /* symbol is undefined in this segment */
1571 switch (opcode[0]) {
1572 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
1573 opcode[0] = 0xe9; /* dword disp jmp */
1574 fragP -> fr_fix += 4;
1575 fix_new (fragP, old_fr_fix, 4,
1576 fragP -> fr_symbol,
1577 (symbolS *) 0,
1578 fragP -> fr_offset, 1);
1579 break;
1580
1581 default:
1582 /* This changes the byte-displacement jump 0x7N -->
1583 the dword-displacement jump 0x0f8N */
1584 opcode[1] = opcode[0] + 0x10;
1585 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
1586 fragP -> fr_fix += 1 + 4; /* we've added an opcode byte */
1587 fix_new (fragP, old_fr_fix + 1, 4,
1588 fragP -> fr_symbol,
1589 (symbolS *) 0,
1590 fragP -> fr_offset, 1);
1591 break;
1592 }
1593 frag_wane (fragP);
1594 }
1595 return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix);
1596 } /* md_estimate_size_before_relax() */
1597
1598 /*
1599 * md_convert_frag();
1600 *
1601 * Called after relax() is finished.
1602 * In: Address of frag.
1603 * fr_type == rs_machine_dependent.
1604 * fr_subtype is what the address relaxed to.
1605 *
1606 * Out: Any fixSs and constants are set up.
1607 * Caller will turn frag into a ".space 0".
1608 */
1609 void
md_convert_frag(fragP)1610 md_convert_frag (fragP)
1611 register fragS * fragP;
1612 {
1613 register uchar * opcode;
1614 uchar * where_to_put_displacement;
1615 uint target_address, opcode_address;
1616 uint extension;
1617 int displacement_from_opcode_start;
1618
1619 opcode = (uchar *) fragP -> fr_opcode;
1620
1621 /* Address we want to reach in file space. */
1622 target_address = fragP->fr_symbol->sy_value + fragP->fr_offset;
1623
1624 /* Address opcode resides at in file space. */
1625 opcode_address = fragP->fr_address + fragP->fr_fix;
1626
1627 /* Displacement from opcode start to fill into instruction. */
1628 displacement_from_opcode_start = target_address - opcode_address;
1629
1630 switch (fragP->fr_subtype) {
1631 case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
1632 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
1633 /* don't have to change opcode */
1634 extension = 1; /* 1 opcode + 1 displacement */
1635 where_to_put_displacement = &opcode[1];
1636 break;
1637
1638 case ENCODE_RELAX_STATE (COND_JUMP, WORD):
1639 opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
1640 opcode[2] = opcode[0] + 0x10;
1641 opcode[0] = WORD_PREFIX_OPCODE;
1642 extension = 4; /* 3 opcode + 2 displacement */
1643 where_to_put_displacement = &opcode[3];
1644 break;
1645
1646 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
1647 opcode[1] = 0xe9;
1648 opcode[0] = WORD_PREFIX_OPCODE;
1649 extension = 3; /* 2 opcode + 2 displacement */
1650 where_to_put_displacement = &opcode[2];
1651 break;
1652
1653 case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
1654 opcode[1] = opcode[0] + 0x10;
1655 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
1656 extension = 5; /* 2 opcode + 4 displacement */
1657 where_to_put_displacement = &opcode[2];
1658 break;
1659
1660 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
1661 opcode[0] = 0xe9;
1662 extension = 4; /* 1 opcode + 4 displacement */
1663 where_to_put_displacement = &opcode[1];
1664 break;
1665
1666 default:
1667 BAD_CASE(fragP -> fr_subtype);
1668 break;
1669 }
1670 /* now put displacement after opcode */
1671 md_number_to_chars (where_to_put_displacement,
1672 displacement_from_opcode_start - extension,
1673 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
1674 fragP -> fr_fix += extension;
1675 }
1676
1677
1678 int md_short_jump_size = 2; /* size of byte displacement jmp */
1679 int md_long_jump_size = 5; /* size of dword displacement jmp */
1680
md_create_short_jump(ptr,from_addr,to_addr)1681 void md_create_short_jump(ptr, from_addr, to_addr)
1682 char *ptr;
1683 long from_addr, to_addr;
1684 {
1685 long offset;
1686
1687 offset = to_addr - (from_addr + 2);
1688 md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */
1689 md_number_to_chars (ptr + 1, offset, 1);
1690 }
1691
md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)1692 void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
1693 char *ptr;
1694 long from_addr, to_addr;
1695 fragS *frag;
1696 symbolS *to_symbol;
1697 {
1698 long offset;
1699
1700 if (flagseen['m']) {
1701 offset = to_addr - to_symbol->sy_value;
1702 md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */
1703 md_number_to_chars (ptr + 1, offset, 4);
1704 fix_new (frag, (ptr+1) - frag->fr_literal, 4,
1705 to_symbol, (symbolS *) 0, (long int) 0, 0);
1706 } else {
1707 offset = to_addr - (from_addr + 5);
1708 md_number_to_chars(ptr, (long) 0xe9, 1);
1709 md_number_to_chars(ptr + 1, offset, 4);
1710 }
1711 }
1712
1713 int
md_parse_option(argP,cntP,vecP)1714 md_parse_option(argP,cntP,vecP)
1715 char **argP;
1716 int *cntP;
1717 char ***vecP;
1718 {
1719 return 1;
1720 }
1721
1722 void /* Knows about order of bytes in address. */
md_number_to_chars(con,value,nbytes)1723 md_number_to_chars (con, value, nbytes)
1724 char con []; /* Return 'nbytes' of chars here. */
1725 long int value; /* The value of the bits. */
1726 int nbytes; /* Number of bytes in the output. */
1727 {
1728 register char * p = con;
1729
1730 switch (nbytes) {
1731 case 1:
1732 p[0] = value & 0xff;
1733 break;
1734 case 2:
1735 p[0] = value & 0xff;
1736 p[1] = (value >> 8) & 0xff;
1737 break;
1738 case 4:
1739 p[0] = value & 0xff;
1740 p[1] = (value>>8) & 0xff;
1741 p[2] = (value>>16) & 0xff;
1742 p[3] = (value>>24) & 0xff;
1743 break;
1744 default:
1745 BAD_CASE (nbytes);
1746 }
1747 }
1748
1749 void /* Knows about order of bytes in address. */
md_number_to_disp(con,value,nbytes)1750 md_number_to_disp (con, value, nbytes)
1751 char con []; /* Return 'nbytes' of chars here. */
1752 long int value; /* The value of the bits. */
1753 int nbytes; /* Number of bytes in the output. */
1754 {
1755 char * answer = alloca (nbytes);
1756 register char * p = answer;
1757
1758 switch (nbytes) {
1759 case 1:
1760 *p = value;
1761 break;
1762 case 2:
1763 *p++ = value;
1764 *p = (value>>8);
1765 break;
1766 case 4:
1767 *p++ = value;
1768 *p++ = (value>>8);
1769 *p++ = (value>>16);
1770 *p = (value>>24);
1771 break;
1772 default:
1773 BAD_CASE (nbytes);
1774 }
1775 bcopy (answer, con, nbytes);
1776 }
1777
1778 void /* Knows about order of bytes in address. */
md_number_to_imm(con,value,nbytes)1779 md_number_to_imm (con, value, nbytes)
1780 char con []; /* Return 'nbytes' of chars here. */
1781 long int value; /* The value of the bits. */
1782 int nbytes; /* Number of bytes in the output. */
1783 {
1784 char * answer = alloca (nbytes);
1785 register char * p = answer;
1786
1787 switch (nbytes) {
1788 case 1:
1789 *p = value;
1790 break;
1791 case 2:
1792 *p++ = value;
1793 *p = (value>>8);
1794 break;
1795 case 4:
1796 *p++ = value;
1797 *p++ = (value>>8);
1798 *p++ = (value>>16);
1799 *p = (value>>24);
1800 break;
1801 default:
1802 BAD_CASE (nbytes);
1803 }
1804 bcopy (answer, con, nbytes);
1805 }
1806
1807 void /* Knows about order of bytes in address. */
md_number_to_field(con,value,nbytes)1808 md_number_to_field (con, value, nbytes)
1809 char con []; /* Return 'nbytes' of chars here. */
1810 long int value; /* The value of the bits. */
1811 int nbytes; /* Number of bytes in the output. */
1812 {
1813 char * answer = alloca (nbytes);
1814 register char * p = answer;
1815
1816 switch (nbytes) {
1817 case 1:
1818 *p = value;
1819 break;
1820 case 2:
1821 *p++ = value;
1822 *p = (value>>8);
1823 break;
1824 case 4:
1825 *p++ = value;
1826 *p++ = (value>>8);
1827 *p++ = (value>>16);
1828 *p = (value>>24);
1829 break;
1830 default:
1831 BAD_CASE (nbytes);
1832 }
1833 bcopy (answer, con, nbytes);
1834 }
1835
1836 long int /* Knows about the byte order in a word. */
md_chars_to_number(con,nbytes)1837 md_chars_to_number (con, nbytes)
1838 unsigned char con[]; /* Low order byte 1st. */
1839 int nbytes; /* Number of bytes in the input. */
1840 {
1841 long int retval;
1842 for (retval=0, con+=nbytes-1; nbytes--; con--)
1843 {
1844 retval <<= BITS_PER_CHAR;
1845 retval |= *con;
1846 }
1847 return retval;
1848 }
1849
md_ri_to_chars(ri_p,ri)1850 void md_ri_to_chars(ri_p, ri)
1851 struct relocation_info *ri_p, ri;
1852 {
1853 unsigned char the_bytes[8];
1854
1855 /* this is easy */
1856 md_number_to_chars(the_bytes, ri.r_address, sizeof(ri.r_address));
1857 /* now the fun stuff */
1858 the_bytes[6] = (ri.r_symbolnum >> 16) & 0x0ff;
1859 the_bytes[5] = (ri.r_symbolnum >> 8) & 0x0ff;
1860 the_bytes[4] = ri.r_symbolnum & 0x0ff;
1861 the_bytes[7] = (((ri.r_extern << 3) & 0x08) | ((ri.r_length << 1) & 0x06) |
1862 ((ri.r_pcrel << 0) & 0x01)) & 0x0F;
1863 /* now put it back where you found it */
1864 bcopy (the_bytes, (char *)ri_p, sizeof(struct relocation_info));
1865 }
1866
1867
1868 #define MAX_LITTLENUMS 6
1869
1870 /* Turn the string pointed to by litP into a floating point constant of type
1871 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
1872 is stored in *sizeP . An error message is returned, or NULL on OK.
1873 */
1874 char *
md_atof(type,litP,sizeP)1875 md_atof(type,litP,sizeP)
1876 char type;
1877 char *litP;
1878 int *sizeP;
1879 {
1880 int prec;
1881 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1882 LITTLENUM_TYPE *wordP;
1883 char *t;
1884 char *atof_ieee();
1885
1886 switch(type) {
1887 case 'f':
1888 case 'F':
1889 prec = 2;
1890 break;
1891
1892 case 'd':
1893 case 'D':
1894 prec = 4;
1895 break;
1896
1897 case 'x':
1898 case 'X':
1899 prec = 5;
1900 break;
1901
1902 default:
1903 *sizeP=0;
1904 return "Bad call to md_atof ()";
1905 }
1906 t = atof_ieee (input_line_pointer,type,words);
1907 if(t)
1908 input_line_pointer=t;
1909
1910 *sizeP = prec * sizeof(LITTLENUM_TYPE);
1911 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
1912 the bigendian 386 */
1913 for(wordP = words + prec - 1;prec--;) {
1914 md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE));
1915 litP += sizeof(LITTLENUM_TYPE);
1916 }
1917 return ""; /* Someone should teach Dean about null pointers */
1918 }
1919
1920 char output_invalid_buf[8];
1921
output_invalid(c)1922 char * output_invalid (c)
1923 char c;
1924 {
1925 if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c);
1926 else sprintf (output_invalid_buf, "(0x%x)", c);
1927 return output_invalid_buf;
1928 }
1929
parse_register(reg_string)1930 reg_entry *parse_register (reg_string)
1931 char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */
1932 {
1933 register char *s = reg_string;
1934 register char *p;
1935 char reg_name_given[MAX_REG_NAME_SIZE];
1936
1937 s++; /* skip REGISTER_PREFIX */
1938 for (p = reg_name_given; is_register_char (*s); p++, s++) {
1939 *p = register_chars [*s];
1940 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
1941 return (reg_entry *) 0;
1942 }
1943 *p = '\0';
1944 return (reg_entry *) hash_find (reg_hash, reg_name_given);
1945 }
1946
1947