Searched refs:CP0C3_DSPP (Results 1 – 3 of 3) sorted by relevance
44 ((0 << CP0C3_M) | (0 << CP0C3_DSPP) | (0 << CP0C3_LPA) | \234 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt),283 (1 << CP0C3_DSPP),330 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |356 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |523 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |974 (1 << CP0C3_DSPP) | (1 << CP0C3_LPA),
901 #define CP0C3_DSPP 10 macro
272 if (env->CP0_Config3 & (1 << CP0C3_DSPP)) { in mips_cpu_reset_hold()