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Searched refs:CP0VPEC1_NCX (Results 1 – 2 of 2) sorted by relevance

/qemu/target/mips/
H A Dcpu.h577 #define CP0VPEC1_NCX 20 macro
/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c622 mask |= (0xff << CP0VPEC1_NCX) | (0xff << CP0VPEC1_NCP2) | in helper_mtc0_vpeconf1()