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123

/qemu/target/arm/tcg/
H A Dsve_ldst_internal.h66 #define DO_LD_PRIM_1(NAME, H, TE, TM) \ argument
67 DO_LD_HOST(NAME, H, TE, TM, ldub_p) \
68 DO_LD_TLB(NAME, H, TE, TM, cpu_ldub_data_ra)
78 #define DO_ST_PRIM_1(NAME, H, TE, TM) \ argument
79 DO_ST_HOST(st1##NAME, H, TE, TM, stb_p) \
80 DO_ST_TLB(st1##NAME, H, TE, TM, cpu_stb_data_ra)
87 #define DO_LD_PRIM_2(NAME, H, TE, TM, LD) \ argument
88 DO_LD_HOST(ld1##NAME##_be, H, TE, TM, LD##_be_p) \
89 DO_LD_HOST(ld1##NAME##_le, H, TE, TM, LD##_le_p) \
93 #define DO_ST_PRIM_2(NAME, H, TE, TM, ST) \ argument
[all …]
H A Dmve_helper.c795 mergemask(&d[H##ESIZE(e)], FN(m[H##ESIZE(e)]), mask); \
882 FN(n[H##ESIZE(e)], m[H##ESIZE(e)]), mask); \ in DO_1OP_IMM()
928 TYPE r_ = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat); \
1157 r[e] = FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)]); \
1159 r[e] = FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)]); \
1418 mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m), mask); \
1434 mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m, &sat), \
1455 FN(d[H##ESIZE(e)], n[H##ESIZE(e)], m), mask); \
1472 FN(d[H##ESIZE(e)], n[H##ESIZE(e)], m, &sat), \
1799 n[H##ESIZE(e - 1 * XCHG)] * m[H##ESIZE(e)]; \
[all …]
H A Dsve_helper.c661 #define DO_ZPZZ_PAIR(NAME, TYPE, H, OP) \ in DO_ZPZZ() argument
1318 d[H(i)] = OP(elt1_a, elt2_a, a[H(i)], sub_r); \ in DO_SQDMLAL()
1319 d[H(i + 1)] = OP(elt1_a, elt2_b, a[H(i + 1)], sub_i); \ in DO_SQDMLAL()
1478 #define DO_ZZXZ(NAME, TYPE, H, OP) \ argument
2897 #define DO_INSR(NAME, TYPE, H) \ argument
3361 #define DO_ZIP(NAME, TYPE, H) \ argument
3377 *(TYPE *)(vd + H(2 * i + 0)) = *(TYPE *)(vn + odd_ofs + H(i)); \
3392 #define DO_UZP(NAME, TYPE, H) \ in DO_ZIP() argument
3404 *(TYPE *)(vd + H(i)) = *(TYPE *)(vn + H(p)); \ in DO_ZIP()
3409 *(TYPE *)(vd + H(i)) = *(TYPE *)(vm + H(p)); \ in DO_ZIP()
[all …]
H A Dsme-fa64.decode29 OK 0-00 1110 0000 0010 0010 11-- ---- ---- # SMOV W|Xd,Vn.H[0]
32 OK 0000 1110 0000 0010 0011 11-- ---- ---- # UMOV Wd,Vn.H[0]
H A Dvec_helper.c1552 #define DO_MUL_IDX(NAME, TYPE, H) \ in DO_MULADD() argument
1560 TYPE mm = m[H(i + idx)]; \ in DO_MULADD()
1574 #define DO_MLA_IDX(NAME, TYPE, OP, H) \ argument
1582 TYPE mm = m[H(i + idx)]; \
1600 #define DO_FMUL_IDX(NAME, ADD, MUL, TYPE, H) \ argument
2410 #define DO_3OP_PAIR(NAME, FUNC, TYPE, H) \ argument
2421 d[H(i)] = FUNC(n[H(i * 2)], n[H(i * 2 + 1)], stat); \
2424 d[H(i + half)] = FUNC(m[H(i * 2)], m[H(i * 2 + 1)], stat); \
2451 #define DO_3OP_PAIR(NAME, FUNC, TYPE, H) \ argument
2462 d[H(i)] = FUNC(n[H(i * 2)], n[H(i * 2 + 1)]); \
[all …]
H A Dsme_helper.c98 #define DO_MOVA_C(NAME, TYPE, H) \ argument
106 *(TYPE *)(za + tile_vslice_offset(i)) = *(TYPE *)(vn + H(i)); \
155 #define DO_MOVA_Z(NAME, TYPE, H) \ argument
163 *(TYPE *)(vd + H(i)) = *(TYPE *)(za + tile_vslice_offset(i)); \
H A Dmve.decode792 # VCVT_<from><to>, S = signed int, U = unsigned int, H = halfprec, F = singleprec
/qemu/target/i386/tcg/
H A Ddecode-new.c.inc112 * vpermd/vpermps 4 4H 0 (§)
113 * vpermq/vpermpd 4 4H-1 1 (§)
127 * (§) 4H and 4H-1 do not mention VEX.W requirements, which are
924 X86_OP_ENTRY3(VMOVSS, V,x, H,x, W,x, vex5),
931 X86_OP_ENTRY3(VMOVSS_ld, V,x, H,x, M,ss, vex5),
932 X86_OP_ENTRY3(VMOVSD_ld, V,x, H,x, M,sd, vex5),
947 X86_OP_ENTRY3(VMOVSS, W,x, H,x, V,x, vex5),
978 X86_OP_ENTRY3(VMOVHLPS, V,dq, H,dq, U,dq, vex7),
1008 X86_OP_ENTRY3(VMOVLHPS, V,dq, H,dq, U,q, vex7),
1026 X86_OP_ENTRY3(VCVTSI2Sx, V,x, H,x, E,y, vex3),
[all …]
/qemu/target/loongarch/tcg/
H A Dvec_helper.c402 DO_VADDA(vadda_h, 16, H)
671 VSAT_S(vsat_h, 16, H)
734 VEXTH(vexth_h_b, 16, H, B)
735 VEXTH(vexth_w_h, 32, W, H)
990 do_vsrlr(H, uint16_t) in do_vsrlr()
1027 VSRLRI(vsrlri_h, 16, H)
1042 do_vsrar(H, int16_t)
1079 VSRARI(vsrari_h, 16, H)
3309 VILVL(vilvl_h, 32, H)
3334 VILVH(vilvh_h, 32, H)
[all …]
/qemu/tests/functional/acpi-bits/bits-tests/
H A Dsmbios.py2107 self.add_field('max_structure_size', u.unpack_one("<H"))
114 self.add_field('number_structures', u.unpack_one("<H"))
148 self.add_field('handle', self.u.unpack_one("<H"))
424 self.add_field('external_clock', u.unpack_one("<H"))
425 self.add_field('max_speed', u.unpack_one("<H"))
426 self.add_field('current_speed', u.unpack_one("<H"))
857 self.add_field('slot_id', u.unpack_one('<H'))
975 self.add_field('item_handle', u.unpack_one('<H'))
1157 self.add_field('size', u.unpack_one("<H"))
1213 self.add_field('speed', u.unpack_one("<H"))
[all …]
/qemu/target/loongarch/
H A Dvec.h13 #define H(x) H[(x) ^ 7] macro
23 #define H(x) H[x] macro
H A Dcpu.h260 int16_t H[LASX_LEN / 16]; member
/qemu/target/riscv/
H A Dvcrypto_helper.c817 Z[0] ^= H[0]; in HELPER()
818 Z[1] ^= H[1]; in HELPER()
820 bool reduce = ((H[1] >> 63) & 1); in HELPER()
821 H[1] = H[1] << 1 | H[0] >> 63; in HELPER()
822 H[0] = H[0] << 1; in HELPER()
824 H[0] ^= 0x87; in HELPER()
853 Z[0] ^= H[0]; in HELPER()
854 Z[1] ^= H[1]; in HELPER()
857 H[1] = H[1] << 1 | H[0] >> 63; in HELPER()
858 H[0] = H[0] << 1; in HELPER()
[all …]
H A Dvector_helper.c154 #define GEN_VEXT_LD_ELEM(NAME, ETYPE, H, LDSUF) \ argument
158 ETYPE *cur = ((ETYPE *)vd + H(idx)); \
370 #define GEN_VEXT_GET_INDEX_ADDR(NAME, ETYPE, H) \ argument
374 return (base + *((ETYPE *)vs2 + H(idx))); \
1892 *((ETYPE *)vd + H(i)) = *(vt + H(i)); \
4847 *((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i - offset)); \
4883 *((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i + s1)); \
4928 *((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i - 1)); \
4979 *((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i + 1)); \
5101 *((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(index)); \
[all …]
/qemu/target/avr/
H A Dtranslate.c1440 tcg_gen_andi_tl(H, addr, 0x00ff0000); in gen_set_addr()
1458 static TCGv gen_get_addr(TCGv H, TCGv M, TCGv L) in gen_get_addr() argument
1462 tcg_gen_deposit_tl(addr, M, H, 8, 8); in gen_get_addr()
1579 TCGv H = cpu_rampD; in trans_LDS() local
1582 tcg_gen_mov_tl(addr, H); /* addr = H:M:L */ in trans_LDS()
1784 TCGv H = cpu_rampD; in trans_STS() local
1787 tcg_gen_mov_tl(addr, H); /* addr = H:M:L */ in trans_STS()
1980 TCGv H = cpu_r[31]; in trans_LPM1() local
1997 TCGv H = cpu_r[31]; in trans_LPM2() local
2014 TCGv H = cpu_r[31]; in trans_LPMX() local
[all …]
/qemu/tests/tcg/hexagon/
H A Dtest_hl.S8 r0.H = #42
/qemu/pc-bios/
H A Dqemu.rsrc91 $"A527 24B9 FC94 5F18 A800 0148 6082 5E02" /* •'$π¸î_.®..H`Ç^. */
107 $"4647 8248 8547 8348 0147 4783 4880 4701" /* FGÇHÖGÉH.GGÉHÄG. */
108 $"440C AA00 011C 4880 4502 4154 F19F FE05" /* D.™...HÄE.ATÒü˛. */
139 $"3A0E 9D12 0213 0E04 BD00 004C 97FE 0148" /* :.ù.....Ω..Ló˛.H */
267 $"4860 825E 025D 5D56 AF52 0255 5756 8058" /* H`Ç^.]]VØR.UWVÄX */
280 $"5351 4E4A 4780 4682 4885 4783 4801 4747" /* SQNJGÄFÇHÖGÉH.GG */
281 $"8348 8047 0144 0CAA 0001 1C48 8045 0244" /* ÉHÄG.D.™...HÄE.D */
422 $"0360 6064 33C4 0003 0139 6718 A800 0148" /* .``d3ƒ...9g.®..H */
437 $"0148 43A2 0006 051E 3947 4847 4682 4885" /* .HC¢....9GHGFÇHÖ */
438 $"4783 4801 4747 8348 8047 0144 0CAA 0001" /* GÉH.GGÉHÄG.D.™.. */
[all …]
/qemu/hw/misc/
H A Dxlnx-zynqmp-apu-ctrl.c108 },{ .name = "RVBAR CPU " #n " High", .addr = A_RVBARADDR ## n ## H, \
/qemu/tests/docker/
H A DMakefile.include22 CUR_TIME := $(shell date +%Y-%m-%d-%H.%M.%S.$$$$)
/qemu/docs/
H A Dxbzrle.txt107 cache size: H bytes
/qemu/target/ppc/
H A Dint_helper.c564 VARITHSAT_SIGNED(H, s16, int32_t, cvtswsh) in VARITHSAT_SIGNED()
567 VARITHSAT_UNSIGNED(H, u16, uint32_t, cvtswuh) in VARITHSAT_SIGNED()
1714 VINSX(H, uint16_t) in VINSX()
1808 VSTRI(VSTRIHL, H, 8, true)
1809 VSTRI(VSTRIHR, H, 8, false)
1892 XXBLEND(H, 16)
/qemu/scripts/
H A Dcheckpatch.pl438 …open($HASH, "-|", "git", "log", "--reverse", "--no-merges", "--no-mailmap", "--format=%H %s", $ARG…
439 die "$P: git log --reverse --no-merges --no-mailmap --format='%H %s' $ARGV[0] failed - $!\n";
/qemu/target/hexagon/imported/
H A Dfloat.idef248 "Multiply high*high and accumulate with L*H value",
H A Dmpy.idef695 #define mixmpy_sema(N,H,RND)\
696 { RdV = fSAT((fSCALE(N,fMPY3216SS(RsV,fGETHALF(H,RtV)))RND)>>16); \
/qemu/target/i386/
H A Dops_sse.h2621 uint32_t H = a->L(0); in helper_sha256rnds2() local
2624 t = SHA256_CH(E, F, G) + SHA256_RNDS1(E) + wk0 + H; in helper_sha256rnds2()
2633 H = G, G = F, F = E, E = EE; in helper_sha256rnds2()
2636 t = SHA256_CH(E, F, G) + SHA256_RNDS1(E) + wk1 + H; in helper_sha256rnds2()

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