Searched refs:MSR_TM (Results 1 – 4 of 4) sorted by relevance
/qemu/target/ppc/ |
H A D | helper_regs.c | 177 if ((ppc_flags & POWERPC_FLAG_TM) && (msr & (1ull << MSR_TM))) { in hreg_compute_hflags_value()
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H A D | cpu.h | 428 #define MSR_TM PPC_BIT_NR(31) /* Transactional Memory Available (Book3s) */ macro 478 FIELD(MSR, TM, MSR_TM, 1)
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H A D | translate.c | 1344 gen_msr_facility_check(ctx, SPR_FSCR, MSR_TM, sprn, FSCR_IC_TM); in spr_read_tm() 1350 gen_msr_facility_check(ctx, SPR_FSCR, MSR_TM, sprn, FSCR_IC_TM); in spr_write_tm() 1356 gen_msr_facility_check(ctx, SPR_FSCR, MSR_TM, sprn, FSCR_IC_TM); in spr_read_tm_upper32() 1362 gen_msr_facility_check(ctx, SPR_FSCR, MSR_TM, sprn, FSCR_IC_TM); in spr_write_tm_upper32()
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H A D | cpu_init.c | 6348 (1ull << MSR_TM) | in POWERPC_FAMILY() 6542 (1ull << MSR_TM) | in POWERPC_FAMILY() 7284 msr |= (target_ulong)1 << MSR_TM; /* Transactional memory */ in ppc_cpu_reset_hold()
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