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Searched refs:OPC2_32_RRR1_MSUB_H_UU (Results 1 – 2 of 2) sorted by relevance

/qemu/target/tricore/
H A Dtricore-opcodes.h1345 OPC2_32_RRR1_MSUB_H_UU = 0x1b, enumerator
H A Dtranslate.c7332 case OPC2_32_RRR1_MSUB_H_UU: in decode_rrr1_msub()