Home
last modified time | relevance | path

Searched refs:SET_MASKED (Results 1 – 2 of 2) sorted by relevance

/qemu/hw/net/
H A Drtl8139.c70 #define SET_MASKED(input, mask, curr) \ macro
1372 val = SET_MASKED(val, 0xe3, s->bChipCmdState); in rtl8139_ChipCmd_write()
1416 val = SET_MASKED(val, 0xff84, s->CpCmd); in rtl8139_CpCmd_write()
1522 val = SET_MASKED(val, 0x31, s->Cfg9346); in rtl8139_Cfg9346_write()
1578 val = SET_MASKED(val, 0xf8, s->Config0); in rtl8139_Config0_write()
1603 val = SET_MASKED(val, 0xC, s->Config1); in rtl8139_Config1_write()
1628 val = SET_MASKED(val, 0x8F, s->Config3); in rtl8139_Config3_write()
1653 val = SET_MASKED(val, 0x0a, s->Config4); in rtl8139_Config4_write()
1674 val = SET_MASKED(val, 0x80, s->Config5); in rtl8139_Config5_write()
2577 val = SET_MASKED(val, 0x1e00, s->IntrMask); in rtl8139_IntrMask_write()
[all …]
H A Deepro100.c1110 val = SET_MASKED(val, 0x31, eeprom->value); in eepro100_write_eeprom()