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Searched refs:TARGET_INSN_SIZE (Results 1 – 4 of 4) sorted by relevance

/qemu/bsd-user/riscv/
H A Dtarget_arch_signal.h26 #define TARGET_INSN_SIZE 4 /* riscv instruction size */ macro
29 #define TARGET_SZSIGCODE ((abi_ulong)(7 * TARGET_INSN_SIZE))
H A Dtarget_arch_cpu.h65 env->pc += TARGET_INSN_SIZE; in target_cpu_loop()
101 env->pc -= TARGET_INSN_SIZE; in target_cpu_loop()
/qemu/bsd-user/aarch64/
H A Dtarget_arch_signal.h31 #define TARGET_INSN_SIZE 4 /* arm64 instruction size */ macro
34 #define TARGET_SZSIGCODE ((abi_ulong)(9 * TARGET_INSN_SIZE))
/qemu/bsd-user/arm/
H A Dtarget_arch_signal.h49 #define TARGET_INSN_SIZE 4 /* arm instruction size */ macro
52 #define TARGET_SZSIGCODE ((abi_ulong)(9 * TARGET_INSN_SIZE))