/qemu/target/i386/tcg/ |
H A D | int_helper.c | 152 al &= 0xff; in helper_aam() 154 al = al % base; in helper_aam() 164 al = ((ah * base) + al) & 0xff; in helper_aad() 165 return al; in helper_aad() 181 al = (al + 6) & 0x0f; in helper_aaa() 206 al = (al - 6) & 0x0f; in helper_aas() 230 al = (al + 6) & 0xff; in helper_daa() 234 al = (al + 0x60) & 0xff; in helper_daa() 257 al1 = al; in helper_das() 263 al = (al - 6) & 0xff; in helper_das() [all …]
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/qemu/tests/migration/i386/ |
H A D | a-b-bootblock.S | 46 inb $0x92,%al 47 or $2,%al 48 outb %al, $0x92 60 outb %al,%dx 87 outb %al,%dx 101 mov $ACPI_ENABLE,%al 102 outb %al,$ACPI_PORT_SMI_CMD
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/qemu/pc-bios/optionrom/ |
H A D | optionrom.h | 66 inb (%dx), %al 68 inb (%dx), %al 70 inb (%dx), %al 72 inb (%dx), %al
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H A D | kvmvapic.S | 45 out %al, $0x7e
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/qemu/tests/tcg/i386/system/ |
H A D | boot.S | 80 test %al, %al 100 out %al,$0xE9
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/qemu/tests/tcg/x86_64/system/ |
H A D | boot.S | 128 test %al, %al 150 out %al,$0xE9
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/qemu/target/s390x/tcg/ |
H A D | int_helper.c | 90 Int128 HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t b) in HELPER() 93 uint64_t r = divu128(&al, &ah, b); in HELPER() 95 return int128_make128(al, r); in HELPER()
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H A D | translate_vx.c.inc | 262 TCGv_i64 al = tcg_temp_new_i64(); 267 read_vec_element_i64(al, a, 1, ES_64); 270 fn(dl, dh, al, ah, bl, bh); 284 TCGv_i64 al = tcg_temp_new_i64(); 291 read_vec_element_i64(al, a, 1, ES_64); 296 fn(dl, dh, al, ah, bl, bh, cl, ch); 307 tcg_gen_add2_i64(dl, dh, al, ah, bl, bh); 1391 tcg_gen_add2_i64(dl, dh, al, ah, bl, bh); 1470 tcg_gen_extract_i64(ah, al, 63, 1); 1472 tcg_gen_add2_i64(dl, dh, al, ah, bl, bh); [all …]
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/qemu/target/alpha/ |
H A D | int_helper.c | 66 uint64_t al, ah, bl, bh, cl, ch; in helper_cmpbge() local 69 al = a & mask; in helper_cmpbge() 76 cl = ((al | test) - bl) & test; in helper_cmpbge()
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/qemu/tcg/ |
H A D | tcg-op.c | 1113 tcg_gen_mov_i32(ret, al); in tcg_gen_extract2_i32() 1116 } else if (al == ah) { in tcg_gen_extract2_i32() 1117 tcg_gen_rotri_i32(ret, al, ofs); in tcg_gen_extract2_i32() 1122 tcg_gen_shri_i32(t0, al, ofs); in tcg_gen_extract2_i32() 1148 tcg_gen_concat_i32_i64(t0, al, ah); in tcg_gen_add2_i32() 2965 tcg_gen_mov_i64(ret, al); in tcg_gen_extract2_i64() 2968 } else if (al == ah) { in tcg_gen_extract2_i64() 2969 tcg_gen_rotri_i64(ret, al, ofs); in tcg_gen_extract2_i64() 2974 tcg_gen_shri_i64(t0, al, ofs); in tcg_gen_extract2_i64() 3014 tcg_gen_add_i64(t0, al, bl); in tcg_gen_add2_i64() [all …]
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H A D | optimize.c | 851 TCGArg al, ah, bl, bh; in do_constant_folding_cond2() local 862 al = args[0]; in do_constant_folding_cond2() 872 if (arg_is_const(al) && arg_is_const(ah)) { in do_constant_folding_cond2() 873 tcg_target_ulong alv = arg_info(al)->val; in do_constant_folding_cond2() 934 op1->args[1] = al; in do_constant_folding_cond2() 1211 uint64_t al = arg_info(op->args[2])->val; in fold_addsub2() local 1219 uint64_t a = deposit64(al, 32, 32, ah); in fold_addsub2() 1228 al = sextract64(a, 0, 32); in fold_addsub2() 1231 Int128 a = int128_make128(al, ah); in fold_addsub2() 1240 al = int128_getlo(a); in fold_addsub2() [all …]
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H A D | tcg-op-ldst.c | 101 TCGTemp *al = addr + HOST_BIG_ENDIAN; in gen_ldst() local 106 temp_arg(al), temp_arg(ah), oi); in gen_ldst() 108 tcg_gen_op4(opc, temp_arg(vl), temp_arg(al), temp_arg(ah), oi); in gen_ldst()
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H A D | tcg-op-vec.c | 237 TCGArg al = tcgv_i32_arg(TCGV_LOW(a)); in tcg_gen_dup_i64_vec() local 239 vec_gen_3(INDEX_op_dup2_vec, type, MO_64, ri, al, ah); in tcg_gen_dup_i64_vec()
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/qemu/include/tcg/ |
H A D | tcg-op-common.h | 120 void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah, 134 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, 136 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, 223 void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah, 237 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al, 239 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 853 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); 854 tcg_out_opc_imm(s, OPC_ADDIU, rl, al, -bl); 856 tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, al, bl); 857 tcg_out_opc_reg(s, OPC_SUBU, rl, al, bl); 862 tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl); 864 } else if (rl == al && rl == bl) { 866 tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); 868 tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); 1011 tcg_out_opc_reg(s, OPC_XOR, TCG_TMP0, al, bl); 1018 tcg_out_setcond(s, tcg_unsigned_cond(cond), TCG_TMP1, al, bl); [all …]
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/qemu/po/ |
H A D | fr_FR.po | 51 msgstr "Zoom _idéal"
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/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 724 TCGReg al, TCGReg ah, 754 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); 755 tcg_out_opc_imm(s, opc_addi, rl, al, -bl); 757 tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_TMP0, al, bl); 758 tcg_out_opc_reg(s, opc_sub, rl, al, bl); 763 tcg_out_opc_imm(s, opc_addi, rl, al, bl); 765 } else if (al == bl) { 772 tcg_out_opc_imm(s, OPC_SLTI, TCG_REG_TMP0, al, 0); 773 tcg_out_opc_reg(s, opc_add, rl, al, al); 775 tcg_out_opc_reg(s, opc_add, rl, al, bl); [all …]
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/qemu/target/riscv/insn_trans/ |
H A D | trans_rvm.c.inc | 27 static void gen_mulhu_i128(TCGv r2, TCGv r3, TCGv al, TCGv ah, TCGv bl, TCGv bh) 35 tcg_gen_mulu2_tl(r0, r1, al, bl); 37 tcg_gen_mulu2_tl(tmpl, tmph, al, bh);
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H A D | trans_rvi.c.inc | 90 TCGv al, TCGv ah, TCGv bl, TCGv bh, 100 tcg_gen_or_tl(rl, al, ah); 102 tcg_gen_xor_tl(rl, al, bl); 115 tcg_gen_sub2_tl(rl, rh, al, ah, bl, bh); 134 tcg_gen_setcond_tl(TCG_COND_LTU, tmp, al, bl);
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/qemu/target/ppc/translate/ |
H A D | vmx-impl.c.inc | 993 al = tcg_temp_new_i64(); 1000 get_avr64(al, a->vra, false); 1005 tcg_gen_movcond_i64(TCG_COND_NE, ah, t1, zero, al, ah); 1006 tcg_gen_movcond_i64(TCG_COND_NE, al, t1, zero, t0, al); 1010 tcg_gen_shl_i64(t1, al, n); 1014 tcg_gen_shr_i64(al, al, n); 1015 tcg_gen_shri_i64(al, al, 1); 1016 tcg_gen_or_i64(t0, al, t0); 1026 do_vrlq_mask(ah, al, vrb, n); 1029 tcg_gen_and_i64(t1, t1, al); [all …]
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/qemu/python/ |
H A D | README.rst | 74 Used by ``make check`` et al.
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/qemu/docs/devel/ |
H A D | ci-definitions.rst.inc | 114 .. [6] Luo, Qingzhou, et al. An empirical analysis of flaky tests.
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_vec.c.inc | 357 TCGv_i64 rh, rl, ah, al, bh, bl; 366 al = tcg_temp_new_i64(); 372 get_vreg64(al, a->vj, i * 2); 376 func(rl, rh, al, ah, bl, bh); 5277 TCGv_i64 ah, al; 5290 al = tcg_temp_new_i64(); 5295 get_vreg64(al, a->vd, 0); 5296 tcg_gen_concat_i64_i128(val, al, ah); 5334 TCGv_i64 ah, al; 5349 al = tcg_temp_new_i64(); [all …]
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/qemu/target/xtensa/core-dc233c/ |
H A D | gdb-config.c.inc | 24 /* idx ofs bi sz al targno flags cp typ group name */
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/qemu/target/xtensa/ |
H A D | overlay_tool.h | 28 #define XTREG(idx, ofs, bi, sz, al, no, fl, cp, typ, grp, name, \ argument
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