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Searched refs:masks (Results 1 – 10 of 10) sorted by relevance

/qemu/include/hw/s390x/
H A Devent-facility.h57 uint8_t masks[]; member
68 #define WEM_CP_RECEIVE_MASK(wem, mask_len) ((wem)->masks)
69 #define WEM_CP_SEND_MASK(wem, mask_len) ((wem)->masks + (mask_len))
70 #define WEM_RECEIVE_MASK(wem, mask_len) ((wem)->masks + 2 * (mask_len))
71 #define WEM_SEND_MASK(wem, mask_len) ((wem)->masks + 3 * (mask_len))
/qemu/hw/ppc/
H A Dspapr_rtas_ddw.c72 const struct { int shift; uint32_t mask; } masks[] = { in spapr_page_mask_to_query_mask() local
84 for (i = 0; i < ARRAY_SIZE(masks); ++i) { in spapr_page_mask_to_query_mask()
85 if (page_mask & (1ULL << masks[i].shift)) { in spapr_page_mask_to_query_mask()
86 mask |= masks[i].mask; in spapr_page_mask_to_query_mask()
/qemu/tests/qtest/
H A Daspeed_hace-test.c444 struct masks { struct
450 static const struct masks ast2600_masks = { argument
456 static const struct masks ast2500_masks = {
462 static const struct masks ast2400_masks = {
469 const struct masks *expected) in test_addresses()
/qemu/tests/functional/acpi-bits/bits-tests/
H A Dtestcpuid.py248 masks = map(find_mask, [eax_mask, ebx_mask, ecx_mask, edx_mask])
52 …s = bits.cpuid_result(*[(r >> shift) & m for r, m in zip(bits.cpuid(cpu, function, index), masks)])
61 shifted_masks = bits.cpuid_result(*[m << shift for m in masks])
/qemu/hw/audio/
H A Dac97.c204 uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT}; in update_sr() local
233 s->glob_sta |= masks[r - s->bm_regs]; in update_sr()
237 s->glob_sta &= ~masks[r - s->bm_regs]; in update_sr()
/qemu/docs/system/s390x/
H A Dvfio-ap.rst222 driver(s). The sysfs locations of the masks are::
256 By default, the two masks are set to reserve all APQNs for use by the default
257 AP queue device drivers. There are two ways the default masks can be changed:
297 2. The masks can also be changed at boot time via parameters on the kernel
302 This would create the following masks:
/qemu/docs/specs/
H A Drocker.rst311 packet data is network-byte order. For example, flow match fields (and masks)
/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc1529 /* Experimental testing shows that hardware masks the immediate. */
1600 * to gather the bits. The masks can be created with
/qemu/tcg/s390x/
H A Dtcg-target.c.inc2794 /* Look for bit masks. */
/qemu/tcg/ppc/
H A Dtcg-target.c.inc1202 /* Load common masks with 2 insns. */