/qemu/target/riscv/insn_trans/ |
H A D | trans_rvk.c.inc | 158 tcg_gen_xor_i32(t1, t1, t2); 160 tcg_gen_xor_i32(t1, t1, t2); 345 tcg_gen_xor_i32(t1, t0, t1); 347 tcg_gen_xor_i32(t1, t1, t0);
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/qemu/target/sh4/ |
H A D | translate.c | 716 tcg_gen_xor_i32(t1, result, Rn); in _decode_opc() 717 tcg_gen_xor_i32(t2, Rm, Rn); in _decode_opc() 745 tcg_gen_xor_i32(cmp2, REG(B7_4), REG(B11_8)); in _decode_opc() 755 tcg_gen_xor_i32(cpu_sr_t, cpu_sr_q, cpu_sr_m); /* SR_T */ in _decode_opc() 774 tcg_gen_xor_i32(t1, cpu_sr_q, cpu_sr_m); in _decode_opc() 782 tcg_gen_xor_i32(t1, t1, t0); in _decode_opc() 784 tcg_gen_xor_i32(cpu_sr_q, cpu_sr_m, t1); in _decode_opc() 944 tcg_gen_xor_i32(t1, result, Rn); in _decode_opc() 945 tcg_gen_xor_i32(t2, Rn, Rm); in _decode_opc() 959 tcg_gen_xor_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc() [all …]
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/qemu/target/rx/ |
H A D | translate.c | 286 tcg_gen_xor_i32(dc->temp, cpu_psw_o, cpu_psw_s); in psw_cond() 292 tcg_gen_xor_i32(dc->temp, cpu_psw_o, cpu_psw_s); in psw_cond() 891 tcg_gen_xor_i32(cpu_psw_s, arg1, arg2); in rx_xor() 971 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_adc() 972 tcg_gen_xor_i32(cpu_psw_z, arg1, arg2); in rx_adc() 1008 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_add() 1009 tcg_gen_xor_i32(cpu_psw_z, arg1, arg2); in rx_add() 1043 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_sub() 1044 tcg_gen_xor_i32(cpu_psw_z, arg1, arg2); in rx_sub() 1929 tcg_gen_xor_i32(val, val, mask); in rx_bnotm() [all …]
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/qemu/target/m68k/ |
H A D | translate.c | 565 tcg_gen_xor_i32(t1, QREG_CC_N, t0); in gen_flush_flags() 1625 tcg_gen_xor_i32(t0, t0, dest); in bcd_add() 1633 tcg_gen_xor_i32(t0, t0, t1); in bcd_add() 1678 tcg_gen_xor_i32(t2, t0, dest); in bcd_sub() 1682 tcg_gen_xor_i32(t0, t1, t2); in bcd_sub() 1885 tcg_gen_xor_i32(dest, src1, tmp); in DISAS_INSN() 2290 tcg_gen_xor_i32(dest, src1, im); in DISAS_INSN() 3080 tcg_gen_xor_i32(tmp, dest, src); in gen_subx() 3199 tcg_gen_xor_i32(dest, src, DREG(insn, 9)); in DISAS_INSN() 3283 tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, src); in gen_addx() [all …]
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/qemu/target/arm/tcg/ |
H A D | translate.c | 446 tcg_gen_xor_i32(tmp, t0, t1); in gen_add16() 451 tcg_gen_xor_i32(dest, t0, tmp); in gen_add16() 483 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0); in gen_add_CC() 484 tcg_gen_xor_i32(tmp, t0, t1); in gen_add_CC() 508 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0); in gen_adc_CC() 509 tcg_gen_xor_i32(tmp, t0, t1); in gen_adc_CC() 521 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0); in gen_sub_CC() 523 tcg_gen_xor_i32(tmp, t0, t1); in gen_sub_CC() 690 tcg_gen_xor_i32(value, cpu_VF, cpu_NF); in arm_test_cc() 699 tcg_gen_xor_i32(value, cpu_VF, cpu_NF); in arm_test_cc() [all …]
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H A D | gengvec64.c | 79 tcg_gen_xor_i32(d, n, m); in gen_xar_i32()
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H A D | translate-vfp.c | 397 tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); in trans_VSEL() 403 tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); in trans_VSEL()
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H A D | translate-a64.c | 810 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32); in gen_add32_CC() 811 tcg_gen_xor_i32(tmp, t0_32, t1_32); in gen_add32_CC() 860 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32); in gen_sub32_CC() 862 tcg_gen_xor_i32(tmp, t0_32, t1_32); in gen_sub32_CC() 923 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32); in gen_adc_CC() 924 tcg_gen_xor_i32(tmp, t0_32, t1_32); in gen_adc_CC() 6520 tcg_gen_xor_i32(cpu_VF, cpu_VF, cpu_NF); in disas_evaluate_into_flags()
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/qemu/tcg/ |
H A D | tcg-op.c | 433 void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) in tcg_gen_xor_i32() function 447 tcg_gen_xor_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_xori_i32() 664 tcg_gen_xor_i32(ret, arg1, arg2); in tcg_gen_eqv_i32() 783 tcg_gen_xor_i32(t, t, arg); in tcg_gen_clrsb_i32() 1412 tcg_gen_xor_i32(ret, a, t); in tcg_gen_abs_i32() 1662 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_xor_i64() 1663 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); in tcg_gen_xor_i64()
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H A D | tcg-op-gvec.c | 1874 tcg_gen_xor_i32(t3, a, b); in tcg_gen_vec_add8_i32() 1877 tcg_gen_xor_i32(d, d, t3); in tcg_gen_vec_add8_i32() 2060 tcg_gen_xor_i32(d, d, t3); in tcg_gen_vec_sub8_i32()
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/qemu/include/tcg/ |
H A D | tcg-op.h | 308 #define tcg_gen_xor_tl tcg_gen_xor_i32
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H A D | tcg-op-common.h | 175 void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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/qemu/target/sparc/ |
H A D | translate.c | 801 tcg_gen_xor_i32(t, src1, src2); in gen_op_fpadds32s() 802 tcg_gen_xor_i32(v, r, src2); in gen_op_fpadds32s() 819 tcg_gen_xor_i32(t, src1, src2); in gen_op_fpsubs32s() 820 tcg_gen_xor_i32(v, r, src1); in gen_op_fpsubs32s() 4971 TRANS(FXORs, VIS1, do_fff, a, tcg_gen_xor_i32) in TRANS()
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/qemu/target/microblaze/ |
H A D | translate.c | 622 DO_TYPEA(xor, false, tcg_gen_xor_i32) in DO_TYPEA() argument
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/qemu/target/ppc/ |
H A D | translate.c | 3852 GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06); 6043 GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06),
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/qemu/target/xtensa/ |
H A D | translate.c | 1432 [BOOLEAN_XOR] = tcg_gen_xor_i32, in translate_boolean() 2630 tcg_gen_xor_i32(arg[0].out, arg[1].in, arg[2].in); in translate_xor()
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/qemu/target/mips/tcg/ |
H A D | mxu_translate.c | 1827 tcg_gen_xor_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32XOR()
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