Home
last modified time | relevance | path

Searched refs:tcg_regset_set_reg (Results 1 – 12 of 12) sorted by relevance

/qemu/tcg/sparc64/
H A Dtcg-target.c.inc968 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
974 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TB);
1644 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G1);
1645 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G2);
1646 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G3);
1647 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G4);
1648 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G5);
1649 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G6);
1650 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_G7);
1651 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_O0);
[all …]
/qemu/tcg/mips/
H A Dtcg-target.c.inc2428 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
2592 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V0);
2593 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V1);
2594 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A0);
2595 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A1);
2596 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A2);
2597 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A3);
2598 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T0);
2599 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T1);
2600 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T2);
[all …]
/qemu/tcg/s390x/
H A Dtcg-target.c.inc3485 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);
3486 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R1);
3487 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2);
3488 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R3);
3489 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R4);
3490 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R5);
3493 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R6);
3497 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V0);
3523 tcg_regset_set_reg(s->reserved_regs, TCG_TMP0);
3525 tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
[all …]
/qemu/tcg/ppc/
H A Dtcg-target.c.inc2854 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
4296 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);
4297 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2);
4298 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R3);
4299 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R4);
4300 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R5);
4301 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R6);
4339 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
4340 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
4341 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP1);
[all …]
/qemu/tcg/arm/
H A Dtcg-target.c.inc2294 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);
2295 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R1);
2296 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2);
2297 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R3);
2298 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R12);
2299 tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14);
2320 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
2321 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
2322 tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
2323 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP);
[all …]
/qemu/tcg/i386/
H A Dtcg-target.c.inc4317 tcg_regset_set_reg(s->reserved_regs, TCG_TMP_VEC);
4320 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM6);
4321 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM7);
4322 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM8);
4323 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM9);
4324 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM10);
4325 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM11);
4326 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM12);
4327 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM13);
4328 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM14);
[all …]
/qemu/tcg/loongarch64/
H A Dtcg-target.c.inc2348 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
2413 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO);
2414 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
2415 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
2416 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
2417 tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
2418 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TP);
2419 tcg_regset_set_reg(s->reserved_regs, TCG_REG_RESERVED);
2420 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
/qemu/tcg/riscv/
H A Dtcg-target.c.inc2086 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
2187 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO);
2188 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
2189 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
2190 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
2191 tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
2192 tcg_regset_set_reg(s->reserved_regs, TCG_REG_GP);
2193 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TP);
/qemu/tcg/
H A Dtcg.c1557 tcg_regset_set_reg(s->reserved_regs, reg); in tcg_global_reg_new_internal()
4735 tcg_regset_set_reg(allocated_regs, its->reg); in tcg_reg_alloc_dup()
4988 tcg_regset_set_reg(i_allocated_regs, reg); in tcg_reg_alloc_op()
5005 tcg_regset_set_reg(t_allocated_regs, reg); in tcg_reg_alloc_op()
5050 tcg_regset_set_reg(i_allocated_regs, reg); in tcg_reg_alloc_op()
5134 tcg_regset_set_reg(o_allocated_regs, reg); in tcg_reg_alloc_op()
5229 tcg_regset_set_reg(allocated_regs, itsl->reg); in tcg_reg_alloc_dup2()
5232 tcg_regset_set_reg(allocated_regs, itsh->reg); in tcg_reg_alloc_dup2()
5311 tcg_regset_set_reg(arg_set, reg); in load_arg_reg()
5335 tcg_regset_set_reg(*allocated_regs, reg); in load_arg_normal()
[all …]
/qemu/tcg/aarch64/
H A Dtcg-target.c.inc3183 tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
3184 tcg_regset_set_reg(s->reserved_regs, TCG_REG_FP);
3185 tcg_regset_set_reg(s->reserved_regs, TCG_REG_X18); /* platform register */
3186 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
3187 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
3188 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
3189 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
3243 tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
/qemu/include/tcg/
H A Dtcg.h179 #define tcg_regset_set_reg(d, r) ((d) |= (TCGRegSet)1 << (r)) macro
/qemu/tcg/tci/
H A Dtcg-target.c.inc946 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
947 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);