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Searched refs:vp (Results 1 – 11 of 11) sorted by relevance

/qemu/hw/watchdog/
H A Dwdt_ib700.c58 static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data) in ib700_write_enable_reg() argument
60 IB700State *s = vp; in ib700_write_enable_reg()
74 static void ib700_write_disable_reg(void *vp, uint32_t addr, uint32_t data) in ib700_write_disable_reg() argument
76 IB700State *s = vp; in ib700_write_disable_reg()
84 static void ib700_timer_expired(void *vp) in ib700_timer_expired() argument
86 IB700State *s = vp; in ib700_timer_expired()
H A Dwdt_i6300esb.c178 static void i6300esb_timer_expired(void *vp) in i6300esb_timer_expired() argument
180 I6300State *d = vp; in i6300esb_timer_expired()
264 static uint32_t i6300esb_mem_readb(void *vp, hwaddr addr) in i6300esb_mem_readb() argument
271 static uint32_t i6300esb_mem_readw(void *vp, hwaddr addr) in i6300esb_mem_readw() argument
274 I6300State *d = vp; in i6300esb_mem_readw()
289 static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr) in i6300esb_mem_readl() argument
296 static void i6300esb_mem_writeb(void *vp, hwaddr addr, uint32_t val) in i6300esb_mem_writeb() argument
298 I6300State *d = vp; in i6300esb_mem_writeb()
308 static void i6300esb_mem_writew(void *vp, hwaddr addr, uint32_t val) in i6300esb_mem_writew() argument
310 I6300State *d = vp; in i6300esb_mem_writew()
[all …]
/qemu/hw/intc/
H A Dmips_gic.c25 static void mips_gic_set_vp_irq(MIPSGICState *gic, int vp, int pin) in mips_gic_set_vp_irq() argument
33 gic->irq_state[i].map_vp == vp && in mips_gic_set_vp_irq()
42 if (((gic->vps[vp].compare_map & GIC_MAP_MSK) == pin) && in mips_gic_set_vp_irq()
43 (gic->vps[vp].mask & GIC_VP_MASK_CMP_MSK)) { in mips_gic_set_vp_irq()
45 ored_level |= (gic->vps[vp].pend & GIC_VP_MASK_CMP_MSK) >> in mips_gic_set_vp_irq()
49 kvm_mips_set_ipi_interrupt(env_archcpu(gic->vps[vp].env), in mips_gic_set_vp_irq()
53 qemu_set_irq(gic->vps[vp].env->irq[pin + GIC_CPU_PIN_OFFSET], in mips_gic_set_vp_irq()
60 int vp = gic->irq_state[n_IRQ].map_vp; in gic_update_pin_for_irq() local
63 if (vp < 0 || vp >= gic->num_vps) { in gic_update_pin_for_irq()
66 mips_gic_set_vp_irq(gic, vp, pin); in gic_update_pin_for_irq()
H A Darmv7m_nvic.c1043 int vp = s->vectpending; in nvic_readl() local
1046 vp = 1; in nvic_readl()
1048 val |= (vp & 0x1ff) << 12; in nvic_readl()
/qemu/hw/hyperv/
H A Dtrace-events8 …e1, uint64_t monitor_page2, uint64_t interrupt_page) "version %d.%d target vp %d mon pages 0x%"PRI…
16 …annel(uint32_t chan_id, uint32_t gpadl_id, uint32_t target_vp) "channel #%d gpadl #%d target vp %d"
/qemu/hw/ppc/
H A Dspapr_vhyp_mmu.c104 target_ulong *vp, target_ulong *rp) in remove_hpte() argument
123 *vp = v; in remove_hpte()
/qemu/target/mips/
H A Dcpu.c119 MIPSCPU *vp = MIPS_CPU(qemu_get_cpu(vp_index)); in cpu_set_exception_base() local
120 vp->env.exception_base = address; in cpu_set_exception_base()
/qemu/target/mips/tcg/
H A Dtranslate.h47 bool vp; member
H A Dtranslate.c5130 CP0_CHECK(ctx->vp); in gen_mfc0()
5260 CP0_CHECK(ctx->vp); in gen_mfc0()
5887 CP0_CHECK(ctx->vp); in gen_mtc0()
5994 CP0_CHECK(ctx->vp); in gen_mtc0()
6637 CP0_CHECK(ctx->vp); in gen_dmfc0()
6747 CP0_CHECK(ctx->vp); in gen_dmfc0()
7354 CP0_CHECK(ctx->vp); in gen_dmtc0()
7461 CP0_CHECK(ctx->vp); in gen_dmtc0()
14487 if (ctx->vp) { in decode_opc_legacy()
14494 if (ctx->vp) { in decode_opc_legacy()
[all …]
H A Dnanomips_translate.c.inc1336 if (ctx->vp) {
1343 if (ctx->vp) {
/qemu/target/i386/tcg/
H A Demit.c.inc882 * 66 = vp* Vx, Hx, Wx