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/dports/science/dalton/dalton-66052b3af5ea7225e31178bf9a8b031913c72190/external/pelib/src/
H A Dpelib.F90175 if (lmul(5)) then
177 else if (lmul(4)) then
179 else if (lmul(3)) then
181 else if (lmul(2)) then
183 else if (lmul(1)) then
185 else if (lmul(0)) then
297 if (lmul(0)) then
300 if (lmul(1)) then
303 if (lmul(2)) then
306 if (lmul(3)) then
[all …]
H A Dpelib_analysis_tools.F90109 if (lmul(0)) then
112 if (lmul(1)) then
115 if (lmul(2)) then
118 if (lmul(3)) then
121 if (lmul(4)) then
124 if (lmul(5)) then
238 if (any(lmul)) then
243 if (lmul(0)) then
248 if (lmul(1)) then
253 if (lmul(2)) then
[all …]
H A Dpelib_operators.F90187 if (any(lmul)) then
198 if (any(lmul)) then
213 if (any(lmul)) then
531 if (lmul(0)) then
1409 if (any(lmul)) then
1646 if (lmul(0)) then
1651 if (lmul(1)) then
1656 if (lmul(2)) then
1661 if (lmul(3)) then
1666 if (lmul(4)) then
[all …]
/dports/security/pgpin/pgp263in/src/
H A Dlmul.h19 #define lmul(i1,i2,ol, oh) (ol=(i1)*(i2), oh=(i1)^(i2))
23 #define lmul(a,b,xl,xh) \
30 #define lmul(a,b,xl,xh) \
38 #define lmul(a,b,xl,xh) asm("mull %3":"=a" (xl),"=d" (xh):"0" (a),"g" (b))
44 #define lmul(a,b,xl,xh) \
52 #define lmul(a,b,xl, xh) \
H A Dr3kd.s237 # 119 lmul(word_v(ma,1),word_v(mb,-1),ml, mh);
271 # 127 lmul( *ma, *mb, nml, nmh);
493 # 186 lmul(word_v(ma,1),word_v(mb,-1),ml, mh);
525 # 194 lmul( *ma, *mb, nml, nmh);
750 # 254 lmul(word_v(ma,1),word_v(mb,-1),ml, mh);
787 # 262 lmul( *ma, *mb, nml, nmh);
1226 # 119 lmul(word_v(ma,1),word_v(mb,-1),ml, mh);
1260 # 127 lmul( *ma, *mb, nml, nmh);
1483 # 186 lmul(word_v(ma,1),word_v(mb,-1),ml, mh);
1515 # 194 lmul( *ma, *mb, nml, nmh);
[all …]
/dports/math/givaro/givaro-4.1.1/src/kernel/recint/
H A Drumul.h194 lmul(ah, b.High, c.High); in lmul_kara()
195 lmul(al, b.Low, c.Low); in lmul_kara()
196 lmul(bc, bb, cc); in lmul_kara()
231 lmul(a.High, a.Low, b, c); in lmul()
239 lmul(retl, a.Low, b.Low, c); in __RECINT_IS_ARITH()
253 lmul(ret, a.Low, b, c); in __RECINT_IS_ARITH()
266 lmul(al, b.Low, c.Low); in mul()
292 lmul(al, al.Low, c.Low); in mul()
313 lmul(ret, a, b, c); in __RECINT_IS_ARITH()
321 lmul(ret, a, a, b); in __RECINT_IS_ARITH()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc115 int legal = widen ? 2 << s->lmul : 1 << s->lmul;
138 return (1 << s->lmul) * nf <= 8;
796 #define MAXSZ(s) (s->vlen >> (3 - s->lmul))
1304 ((a->rd != 0) || (s->lmul == 0)));
1331 ((a->rd != 0) || (s->lmul == 0)));
1452 2 << s->lmul) &&
1492 2 << s->lmul) &&
1546 (s->lmul == 0)));
1560 (s->lmul == 0)));
2173 (s->lmul == 0)));
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc106 int legal = widen ? 2 << s->lmul : 1 << s->lmul;
129 return (1 << s->lmul) * nf <= 8;
771 #define MAXSZ(s) (s->vlen >> (3 - s->lmul))
1271 ((a->rd != 0) || (s->lmul == 0)));
1298 ((a->rd != 0) || (s->lmul == 0)));
1416 2 << s->lmul) &&
1457 2 << s->lmul) &&
1511 (s->lmul == 0)));
1525 (s->lmul == 0)));
2136 (s->lmul == 0)));
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc106 int legal = widen ? 2 << s->lmul : 1 << s->lmul;
129 return (1 << s->lmul) * nf <= 8;
774 #define MAXSZ(s) (s->vlen >> (3 - s->lmul))
1274 ((a->rd != 0) || (s->lmul == 0)));
1301 ((a->rd != 0) || (s->lmul == 0)));
1419 2 << s->lmul) &&
1460 2 << s->lmul) &&
1514 (s->lmul == 0)));
1528 (s->lmul == 0)));
2140 (s->lmul == 0)));
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc115 int legal = widen ? 2 << s->lmul : 1 << s->lmul;
138 return (1 << s->lmul) * nf <= 8;
796 #define MAXSZ(s) (s->vlen >> (3 - s->lmul))
1304 ((a->rd != 0) || (s->lmul == 0)));
1331 ((a->rd != 0) || (s->lmul == 0)));
1452 2 << s->lmul) &&
1492 2 << s->lmul) &&
1546 (s->lmul == 0)));
1560 (s->lmul == 0)));
2173 (s->lmul == 0)));
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/XCore/
H A Dmul64.ll12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul

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