/dports/devel/libfirm/libfirm-1.21.0/ir/be/ia32/ |
H A D | ia32_x87.c | 711 const arch_register_t *op1_reg = x87_get_irn_register(op1); in sim_binop() local 714 int reg_index_1 = op1_reg->index; in sim_binop() 720 DB((dbg, LEVEL_1, ">>> %+F %s, %s -> %s\n", n, op1_reg->name, op2_reg->name, out->name)); in sim_binop() 853 arch_register_t const *const op1_reg = x87_get_irn_register(op1); in sim_unop() local 854 int const op1_reg_idx = op1_reg->index; in sim_unop()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/llvm12/llvm-project-12.0.1.src/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/llvm12/llvm-project-12.0.1.src/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/llvm13/llvm-project-13.0.1.src/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/llvm13/llvm-project-13.0.1.src/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/radare2/radare2-5.1.1/libr/anal/p/ |
H A D | anal_xtensa.c | 1140 ut32 op1_reg; in esil_branch_compare() local 1146 xtensa_operand_get_field (isa, opcode, 0, format, i, slot_buffer, &op1_reg); in esil_branch_compare() 1192 op1_reg, in esil_branch_compare() 1261 ut32 op1_reg; in esil_branch_check_mask() local 1268 xtensa_operand_get_field (isa, opcode, 0, format, i, slot_buffer, &op1_reg); in esil_branch_check_mask() 1323 op1_reg, in esil_branch_check_mask()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1571 RegisterInfo op1_reg; in EmulateMUL() local 1573 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1578 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3283 RegisterInfo op1_reg; in EmulateADDReg() local 3285 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3287 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); 3276 RegisterInfo op1_reg; 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg);
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/s390/ |
H A D | s390.c | 17081 rtx op0_reg, op1_reg; in expand_perm_with_vpdi() local 17100 op1_reg = force_reg (GET_MODE (d.op1), d.op1); in expand_perm_with_vpdi() 17103 emit_insn (gen_vpdi1 (d.vmode, d.target, op0_reg, op1_reg)); in expand_perm_with_vpdi() 17106 emit_insn (gen_vpdi4 (d.vmode, d.target, op0_reg, op1_reg)); in expand_perm_with_vpdi()
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/dports/lang/php80/php-8.0.15/ext/opcache/jit/ |
H A D | zend_jit_x86.dasc | 744 | AVX_OP vaddsd, reg, op1_reg, addr, tmp_reg 747 | AVX_OP vsubsd, reg, op1_reg, addr, tmp_reg 750 | AVX_OP vmulsd, reg, op1_reg, addr, tmp_reg 4596 zend_reg op1_reg; 4599 op1_reg = Z_REG(op1_addr); 4602 op1_reg = result_reg; 4658 zend_reg op1_reg; 4662 op1_reg = Z_REG(op1_addr); 4665 op1_reg = Z_REG(op2_addr); 4669 op1_reg = result_reg; [all …]
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/dports/lang/php81/php-8.1.1/ext/opcache/jit/ |
H A D | zend_jit_arm64.dasc | 4221 zend_reg result_reg, op1_reg, op2_reg; 4232 op1_reg = Z_REG(op1_addr); 4234 op1_reg = ZREG_FPTMP; 4248 op1_reg = Z_REG(op1_addr); 4251 op1_reg = result_reg; 4285 zend_reg result_reg, op1_reg, op2_reg; 4299 op1_reg = Z_REG(op1_addr); 4302 op1_reg = Z_REG(op2_addr); 4306 op1_reg = result_reg; 4312 | DOUBLE_MATH_REG ZEND_ADD, result_reg, op1_reg, op1_reg [all …]
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H A D | zend_jit_x86.dasc | 735 | AVX_OP vaddsd, reg, op1_reg, addr, tmp_reg 738 | AVX_OP vsubsd, reg, op1_reg, addr, tmp_reg 741 | AVX_OP vmulsd, reg, op1_reg, addr, tmp_reg 4624 zend_reg op1_reg; 4627 op1_reg = Z_REG(op1_addr); 4630 op1_reg = result_reg; 4686 zend_reg op1_reg; 4690 op1_reg = Z_REG(op1_addr); 4693 op1_reg = Z_REG(op2_addr); 4697 op1_reg = result_reg; [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1564 RegisterInfo op1_reg; in EmulateMUL() local 1566 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg); in EmulateMUL() 1571 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateMUL() 3276 RegisterInfo op1_reg; in EmulateADDReg() local 3278 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg); in EmulateADDReg() 3280 context.SetRegisterRegisterOperands(op1_reg, op2_reg); in EmulateADDReg()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 273 void SetRegisterRegisterOperands(RegisterInfo op1_reg, in SetRegisterRegisterOperands() 276 info.RegisterRegisterOperands.operand1 = op1_reg; in SetRegisterRegisterOperands()
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