/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
H A D | ADSP-EDN-BF549-extended_def.h | 1762 #define SPORT0_MRCS1 0xFFC00854 /* SPORT0 Multi channel Receive Select Register 1… macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf548/ |
H A D | ADSP-EDN-BF549-extended_def.h | 1758 #define SPORT0_MRCS1 0xFFC00854 /* SPORT0 Multi channel Receive Select Register 1… macro
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
H A D | ADSP-EDN-BF549-extended_def.h | 1762 #define SPORT0_MRCS1 0xFFC00854 /* SPORT0 Multi channel Receive Select Register 1… macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1841 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) 1842 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1843 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/ |
H A D | cdefBF539.h | 320 #define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1)
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H A D | defBF534.h | 185 #define SPORT0_MRCS1 0xFFC00854 /* SPORT0 Multi-Channel Receive Select Register 1 */ macro
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H A D | defBF549.h | 86 #define SPORT0_MRCS1 0xffc00854 /* SPORT0 Multi channel Receive Select Regis… macro
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H A D | cdefBF50x_base.h | 207 #define pSPORT0_MRCS1 ((volatile uint32_t *)SPORT0_MRCS1)
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H A D | defBF50x_base.h | 202 #define SPORT0_MRCS1 0xFFC00854 /* SPORT0 Multi-Channel Receive Select Register 1 */ macro
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_cdef.h | 1232 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 1233 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
H A D | ADSP-EDN-BF534-extended_cdef.h | 350 #define pSPORT0_MRCS1 ((uint32_t volatile *)SPORT0_MRCS1) /* SPORT0 Multi-Channel … 351 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 352 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf537/ |
H A D | BF534_cdef.h | 238 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 239 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf506/ |
H A D | BF504_cdef.h | 242 #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) 243 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
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